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@@ -1276,14 +1276,14 @@ static void bnx2x_program_serdes(struct link_params *params,
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struct bnx2x *bp = params->bp;
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u16 reg_val;
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- /* program duplex, disable autoneg */
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-
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+ /* program duplex, disable autoneg and sgmii*/
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CL45_RD_OVER_CL22(bp, params->port,
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params->phy_addr,
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MDIO_REG_BANK_COMBO_IEEE0,
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MDIO_COMBO_IEEE0_MII_CONTROL, ®_val);
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reg_val &= ~(MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX |
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- MDIO_COMBO_IEEO_MII_CONTROL_AN_EN);
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+ MDIO_COMBO_IEEO_MII_CONTROL_AN_EN |
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+ MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_MASK);
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if (params->req_duplex == DUPLEX_FULL)
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reg_val |= MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX;
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CL45_WR_OVER_CL22(bp, params->port,
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@@ -5271,6 +5271,13 @@ static u8 bnx2x_ext_phy_is_link_up(struct link_params *params,
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ext_phy_link_up = 0;
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break;
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}
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+ /* Set SGMII mode for external phy */
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+ if (ext_phy_type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT) {
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+ if (vars->line_speed < SPEED_1000)
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+ vars->phy_flags |= PHY_SGMII_FLAG;
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+ else
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+ vars->phy_flags &= ~PHY_SGMII_FLAG;
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+ }
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} else { /* SerDes */
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ext_phy_type = SERDES_EXT_PHY_TYPE(params->ext_phy_config);
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