|
@@ -185,6 +185,11 @@ enum {
|
|
|
COMMANDSTAT = 0x20,
|
|
|
};
|
|
|
|
|
|
+/* TRANSCFG (transport-layer) configuration control */
|
|
|
+enum {
|
|
|
+ TRANSCFG_RX_WATER_MARK = (1 << 4),
|
|
|
+};
|
|
|
+
|
|
|
/* PHY (link-layer) configuration control */
|
|
|
enum {
|
|
|
PHY_BIST_ENABLE = 0x01,
|
|
@@ -1305,6 +1310,7 @@ static int sata_fsl_probe(struct platform_device *ofdev,
|
|
|
struct sata_fsl_host_priv *host_priv = NULL;
|
|
|
int irq;
|
|
|
struct ata_host *host;
|
|
|
+ u32 temp;
|
|
|
|
|
|
struct ata_port_info pi = sata_fsl_port_info[0];
|
|
|
const struct ata_port_info *ppi[] = { &pi, NULL };
|
|
@@ -1319,6 +1325,12 @@ static int sata_fsl_probe(struct platform_device *ofdev,
|
|
|
ssr_base = hcr_base + 0x100;
|
|
|
csr_base = hcr_base + 0x140;
|
|
|
|
|
|
+ if (!of_device_is_compatible(ofdev->dev.of_node, "fsl,mpc8315-sata")) {
|
|
|
+ temp = ioread32(csr_base + TRANSCFG);
|
|
|
+ temp = temp & 0xffffffe0;
|
|
|
+ iowrite32(temp | TRANSCFG_RX_WATER_MARK, csr_base + TRANSCFG);
|
|
|
+ }
|
|
|
+
|
|
|
DPRINTK("@reset i/o = 0x%x\n", ioread32(csr_base + TRANSCFG));
|
|
|
DPRINTK("sizeof(cmd_desc) = %d\n", sizeof(struct command_desc));
|
|
|
DPRINTK("sizeof(#define cmd_desc) = %d\n", SATA_FSL_CMD_DESC_SIZE);
|