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@@ -469,8 +469,6 @@ int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps)
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inbuf = inmailbox->buf;
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outbuf = outmailbox->buf;
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- memset(inbuf, 0, 256);
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- memset(outbuf, 0, 256);
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inbuf[0] = 1;
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inbuf[1] = 1;
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inbuf[2] = 1;
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@@ -653,8 +651,6 @@ int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, int pkey_tbl_sz)
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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- memset(mailbox->buf, 0, 256);
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-
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((__be32 *) mailbox->buf)[1] = dev->caps.ib_port_def_cap[port];
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if (pkey_tbl_sz >= 0 && mlx4_is_master(dev)) {
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@@ -692,8 +688,6 @@ int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu,
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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context = mailbox->buf;
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- memset(context, 0, sizeof *context);
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-
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context->flags = SET_PORT_GEN_ALL_VALID;
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context->mtu = cpu_to_be16(mtu);
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context->pptx = (pptx * (!pfctx)) << 7;
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@@ -727,8 +721,6 @@ int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn,
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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context = mailbox->buf;
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- memset(context, 0, sizeof *context);
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-
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context->base_qpn = cpu_to_be32(base_qpn);
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context->n_mac = dev->caps.log_num_macs;
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context->promisc = cpu_to_be32(promisc << SET_PORT_PROMISC_SHIFT |
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@@ -761,8 +753,6 @@ int mlx4_SET_PORT_PRIO2TC(struct mlx4_dev *dev, u8 port, u8 *prio2tc)
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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context = mailbox->buf;
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- memset(context, 0, sizeof *context);
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-
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for (i = 0; i < MLX4_NUM_UP; i += 2)
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context->prio2tc[i >> 1] = prio2tc[i] << 4 | prio2tc[i + 1];
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@@ -788,7 +778,6 @@ int mlx4_SET_PORT_SCHEDULER(struct mlx4_dev *dev, u8 port, u8 *tc_tx_bw,
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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context = mailbox->buf;
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- memset(context, 0, sizeof *context);
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for (i = 0; i < MLX4_NUM_TC; i++) {
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struct mlx4_port_scheduler_tc_cfg_be *tc = &context->tc[i];
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