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@@ -441,6 +441,7 @@ MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}");
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*/
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/* status */
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#define HDSPM_AES32_wcLock 0x0200000
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+#define HDSPM_AES32_wcSync 0x0100000
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#define HDSPM_AES32_wcFreq_bit 22
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/* (status >> HDSPM_AES32_wcFreq_bit) & 0xF gives WC frequency (cf function
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HDSPM_bit2freq */
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@@ -3467,10 +3468,12 @@ static int hdspm_wc_sync_check(struct hdspm *hdspm)
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switch (hdspm->io_type) {
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case AES32:
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status = hdspm_read(hdspm, HDSPM_statusRegister);
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- if (status & HDSPM_wcSync)
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- return 2;
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- else if (status & HDSPM_wcLock)
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- return 1;
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+ if (status & HDSPM_AES32_wcLock) {
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+ if (status & HDSPM_AES32_wcSync)
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+ return 2;
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+ else
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+ return 1;
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+ }
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return 0;
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break;
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@@ -4658,6 +4661,7 @@ snd_hdspm_proc_read_aes32(struct snd_info_entry * entry,
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unsigned int status;
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unsigned int status2;
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unsigned int timecode;
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+ unsigned int wcLock, wcSync;
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int pref_syncref;
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char *autosync_ref;
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int x;
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@@ -4751,8 +4755,11 @@ snd_hdspm_proc_read_aes32(struct snd_info_entry * entry,
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snd_iprintf(buffer, "--- Status:\n");
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+ wcLock = status & HDSPM_AES32_wcLock;
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+ wcSync = wcLock && (status & HDSPM_AES32_wcSync);
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+
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snd_iprintf(buffer, "Word: %s Frequency: %d\n",
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- (status & HDSPM_AES32_wcLock) ? "Sync " : "No Lock",
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+ (wcLock) ? (wcSync ? "Sync " : "Lock ") : "No Lock",
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HDSPM_bit2freq((status >> HDSPM_AES32_wcFreq_bit) & 0xF));
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for (x = 0; x < 8; x++) {
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