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[ARM] 4907/1: [AT91] SAM9/CAP9 reset reason

The Reset controller on the SAM9/CAP9 processors will store the reason
for the last system reset.
On startup, display this information (wakeup signal, RTT alarm,
watchdog reset, user reset, etc)

Based on patch from David Brownell.

Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Andrew Victor 17 年之前
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共有 2 個文件被更改,包括 76 次插入0 次删除
  1. 74 0
      arch/arm/mach-at91/pm.c
  2. 2 0
      include/asm-arm/arch-at91/at91_shdwc.h

+ 74 - 0
arch/arm/mach-at91/pm.c

@@ -83,6 +83,79 @@ static inline void sdram_selfrefresh_enable(void)
 #endif
 #endif
 
 
 
 
+/*
+ * Show the reason for the previous system reset.
+ */
+#if defined(AT91_SHDWC)
+
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/at91_shdwc.h>
+
+static void __init show_reset_status(void)
+{
+	static char reset[] __initdata = "reset";
+
+	static char general[] __initdata = "general";
+	static char wakeup[] __initdata = "wakeup";
+	static char watchdog[] __initdata = "watchdog";
+	static char software[] __initdata = "software";
+	static char user[] __initdata = "user";
+	static char unknown[] __initdata = "unknown";
+
+	static char signal[] __initdata = "signal";
+	static char rtc[] __initdata = "rtc";
+	static char rtt[] __initdata = "rtt";
+	static char restore[] __initdata = "power-restored";
+
+	char *reason, *r2 = reset;
+	u32 reset_type, wake_type;
+
+	reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
+	wake_type = at91_sys_read(AT91_SHDW_SR);
+
+	switch (reset_type) {
+	case AT91_RSTC_RSTTYP_GENERAL:
+		reason = general;
+		break;
+	case AT91_RSTC_RSTTYP_WAKEUP:
+		/* board-specific code enabled the wakeup sources */
+		reason = wakeup;
+
+		/* "wakeup signal" */
+		if (wake_type & AT91_SHDW_WAKEUP0)
+			r2 = signal;
+		else {
+			r2 = reason;
+			if (wake_type & AT91_SHDW_RTTWK)	/* rtt wakeup */
+				reason = rtt;
+			else if (wake_type & AT91_SHDW_RTCWK)	/* rtc wakeup */
+				reason = rtc;
+			else if (wake_type == 0)	/* power-restored wakeup */
+				reason = restore;
+			else				/* unknown wakeup */
+				reason = unknown;
+		}
+		break;
+	case AT91_RSTC_RSTTYP_WATCHDOG:
+		reason = watchdog;
+		break;
+	case AT91_RSTC_RSTTYP_SOFTWARE:
+		reason = software;
+		break;
+	case AT91_RSTC_RSTTYP_USER:
+		reason = user;
+		break;
+	default:
+		reason = unknown;
+		break;
+	}
+	pr_info("AT91: Starting after %s %s\n", reason, r2);
+}
+#else
+static void __init show_reset_status(void) {}
+#endif
+
+
 static int at91_pm_valid_state(suspend_state_t state)
 static int at91_pm_valid_state(suspend_state_t state)
 {
 {
 	switch (state) {
 	switch (state) {
@@ -294,6 +367,7 @@ static int __init at91_pm_init(void)
 
 
 	suspend_set_ops(&at91_pm_ops);
 	suspend_set_ops(&at91_pm_ops);
 
 
+	show_reset_status();
 	return 0;
 	return 0;
 }
 }
 arch_initcall(at91_pm_init);
 arch_initcall(at91_pm_init);

+ 2 - 0
include/asm-arm/arch-at91/at91_shdwc.h

@@ -24,10 +24,12 @@
 #define			AT91_SHDW_WKMODE0_LOW		2
 #define			AT91_SHDW_WKMODE0_LOW		2
 #define			AT91_SHDW_WKMODE0_ANYLEVEL	3
 #define			AT91_SHDW_WKMODE0_ANYLEVEL	3
 #define		AT91_SHDW_CPTWK0	(0xf << 4)		/* Counter On Wake Up 0 */
 #define		AT91_SHDW_CPTWK0	(0xf << 4)		/* Counter On Wake Up 0 */
+#define			AT91_SHDW_CPTWK0_(x)	((x) << 4)
 #define		AT91_SHDW_RTTWKEN	(1   << 16)		/* Real Time Timer Wake-up Enable */
 #define		AT91_SHDW_RTTWKEN	(1   << 16)		/* Real Time Timer Wake-up Enable */
 
 
 #define AT91_SHDW_SR		(AT91_SHDWC + 0x08)	/* Shut Down Status Register */
 #define AT91_SHDW_SR		(AT91_SHDWC + 0x08)	/* Shut Down Status Register */
 #define		AT91_SHDW_WAKEUP0	(1 <<  0)		/* Wake-up 0 Status */
 #define		AT91_SHDW_WAKEUP0	(1 <<  0)		/* Wake-up 0 Status */
 #define		AT91_SHDW_RTTWK		(1 << 16)		/* Real-time Timer Wake-up */
 #define		AT91_SHDW_RTTWK		(1 << 16)		/* Real-time Timer Wake-up */
+#define		AT91_SHDW_RTCWK		(1 << 17)		/* Real-time Clock Wake-up [SAM9RL] */
 
 
 #endif
 #endif