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@@ -191,38 +191,38 @@ static void get_controller(unsigned int irq, unsigned int *base,
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}
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}
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-static void lpc32xx_mask_irq(unsigned int irq)
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+static void lpc32xx_mask_irq(struct irq_data *d)
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{
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unsigned int reg, ctrl, mask;
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- get_controller(irq, &ctrl, &mask);
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+ get_controller(d->irq, &ctrl, &mask);
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reg = __raw_readl(LPC32XX_INTC_MASK(ctrl)) & ~mask;
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__raw_writel(reg, LPC32XX_INTC_MASK(ctrl));
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}
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-static void lpc32xx_unmask_irq(unsigned int irq)
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+static void lpc32xx_unmask_irq(struct irq_data *d)
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{
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unsigned int reg, ctrl, mask;
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- get_controller(irq, &ctrl, &mask);
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+ get_controller(d->irq, &ctrl, &mask);
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reg = __raw_readl(LPC32XX_INTC_MASK(ctrl)) | mask;
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__raw_writel(reg, LPC32XX_INTC_MASK(ctrl));
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}
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-static void lpc32xx_ack_irq(unsigned int irq)
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+static void lpc32xx_ack_irq(struct irq_data *d)
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{
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unsigned int ctrl, mask;
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- get_controller(irq, &ctrl, &mask);
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+ get_controller(d->irq, &ctrl, &mask);
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__raw_writel(mask, LPC32XX_INTC_RAW_STAT(ctrl));
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/* Also need to clear pending wake event */
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- if (lpc32xx_events[irq].mask != 0)
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- __raw_writel(lpc32xx_events[irq].mask,
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- lpc32xx_events[irq].event_group->rawstat_reg);
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+ if (lpc32xx_events[d->irq].mask != 0)
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+ __raw_writel(lpc32xx_events[d->irq].mask,
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+ lpc32xx_events[d->irq].event_group->rawstat_reg);
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}
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static void __lpc32xx_set_irq_type(unsigned int irq, int use_high_level,
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@@ -261,27 +261,27 @@ static void __lpc32xx_set_irq_type(unsigned int irq, int use_high_level,
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}
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}
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-static int lpc32xx_set_irq_type(unsigned int irq, unsigned int type)
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+static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type)
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{
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switch (type) {
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case IRQ_TYPE_EDGE_RISING:
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/* Rising edge sensitive */
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- __lpc32xx_set_irq_type(irq, 1, 1);
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+ __lpc32xx_set_irq_type(d->irq, 1, 1);
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break;
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case IRQ_TYPE_EDGE_FALLING:
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/* Falling edge sensitive */
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- __lpc32xx_set_irq_type(irq, 0, 1);
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+ __lpc32xx_set_irq_type(d->irq, 0, 1);
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break;
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case IRQ_TYPE_LEVEL_LOW:
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/* Low level sensitive */
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- __lpc32xx_set_irq_type(irq, 0, 0);
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+ __lpc32xx_set_irq_type(d->irq, 0, 0);
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break;
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case IRQ_TYPE_LEVEL_HIGH:
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/* High level sensitive */
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- __lpc32xx_set_irq_type(irq, 1, 0);
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+ __lpc32xx_set_irq_type(d->irq, 1, 0);
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break;
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/* Other modes are not supported */
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@@ -290,33 +290,33 @@ static int lpc32xx_set_irq_type(unsigned int irq, unsigned int type)
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}
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/* Ok to use the level handler for all types */
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- set_irq_handler(irq, handle_level_irq);
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+ set_irq_handler(d->irq, handle_level_irq);
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return 0;
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}
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-static int lpc32xx_irq_wake(unsigned int irqno, unsigned int state)
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+static int lpc32xx_irq_wake(struct irq_data *d, unsigned int state)
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{
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unsigned long eventreg;
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- if (lpc32xx_events[irqno].mask != 0) {
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- eventreg = __raw_readl(lpc32xx_events[irqno].
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+ if (lpc32xx_events[d->irq].mask != 0) {
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+ eventreg = __raw_readl(lpc32xx_events[d->irq].
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event_group->enab_reg);
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if (state)
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- eventreg |= lpc32xx_events[irqno].mask;
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+ eventreg |= lpc32xx_events[d->irq].mask;
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else
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- eventreg &= ~lpc32xx_events[irqno].mask;
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+ eventreg &= ~lpc32xx_events[d->irq].mask;
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__raw_writel(eventreg,
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- lpc32xx_events[irqno].event_group->enab_reg);
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+ lpc32xx_events[d->irq].event_group->enab_reg);
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return 0;
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}
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/* Clear event */
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- __raw_writel(lpc32xx_events[irqno].mask,
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- lpc32xx_events[irqno].event_group->rawstat_reg);
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+ __raw_writel(lpc32xx_events[d->irq].mask,
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+ lpc32xx_events[d->irq].event_group->rawstat_reg);
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return -ENODEV;
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}
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@@ -336,11 +336,11 @@ static void __init lpc32xx_set_default_mappings(unsigned int apr,
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}
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static struct irq_chip lpc32xx_irq_chip = {
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- .ack = lpc32xx_ack_irq,
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- .mask = lpc32xx_mask_irq,
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- .unmask = lpc32xx_unmask_irq,
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- .set_type = lpc32xx_set_irq_type,
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- .set_wake = lpc32xx_irq_wake
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+ .irq_ack = lpc32xx_ack_irq,
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+ .irq_mask = lpc32xx_mask_irq,
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+ .irq_unmask = lpc32xx_unmask_irq,
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+ .irq_set_type = lpc32xx_set_irq_type,
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+ .irq_set_wake = lpc32xx_irq_wake
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};
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static void lpc32xx_sic1_handler(unsigned int irq, struct irq_desc *desc)
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