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@@ -145,7 +145,7 @@ MODULE_PARM_DESC(rx_xon_thresh_bytes, "RX fifo XON threshold");
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#define PCI_EXP_LNKSTA_LNK_WID_LBN 4
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#define PCI_EXP_LNKSTA_LNK_WID_LBN 4
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#define FALCON_IS_DUAL_FUNC(efx) \
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#define FALCON_IS_DUAL_FUNC(efx) \
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- (FALCON_REV(efx) < FALCON_REV_B0)
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+ (falcon_rev(efx) < FALCON_REV_B0)
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/**************************************************************************
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/**************************************************************************
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*
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*
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@@ -465,7 +465,7 @@ int falcon_init_tx(struct efx_tx_queue *tx_queue)
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TX_DESCQ_TYPE, 0,
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TX_DESCQ_TYPE, 0,
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TX_NON_IP_DROP_DIS_B0, 1);
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TX_NON_IP_DROP_DIS_B0, 1);
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- if (FALCON_REV(efx) >= FALCON_REV_B0) {
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+ if (falcon_rev(efx) >= FALCON_REV_B0) {
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int csum = !(efx->net_dev->features & NETIF_F_IP_CSUM);
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int csum = !(efx->net_dev->features & NETIF_F_IP_CSUM);
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EFX_SET_OWORD_FIELD(tx_desc_ptr, TX_IP_CHKSM_DIS_B0, csum);
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EFX_SET_OWORD_FIELD(tx_desc_ptr, TX_IP_CHKSM_DIS_B0, csum);
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EFX_SET_OWORD_FIELD(tx_desc_ptr, TX_TCP_CHKSM_DIS_B0, csum);
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EFX_SET_OWORD_FIELD(tx_desc_ptr, TX_TCP_CHKSM_DIS_B0, csum);
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@@ -474,7 +474,7 @@ int falcon_init_tx(struct efx_tx_queue *tx_queue)
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falcon_write_table(efx, &tx_desc_ptr, efx->type->txd_ptr_tbl_base,
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falcon_write_table(efx, &tx_desc_ptr, efx->type->txd_ptr_tbl_base,
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tx_queue->queue);
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tx_queue->queue);
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- if (FALCON_REV(efx) < FALCON_REV_B0) {
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+ if (falcon_rev(efx) < FALCON_REV_B0) {
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efx_oword_t reg;
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efx_oword_t reg;
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BUG_ON(tx_queue->queue >= 128); /* HW limit */
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BUG_ON(tx_queue->queue >= 128); /* HW limit */
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@@ -635,7 +635,7 @@ int falcon_init_rx(struct efx_rx_queue *rx_queue)
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efx_oword_t rx_desc_ptr;
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efx_oword_t rx_desc_ptr;
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struct efx_nic *efx = rx_queue->efx;
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struct efx_nic *efx = rx_queue->efx;
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int rc;
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int rc;
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- int is_b0 = FALCON_REV(efx) >= FALCON_REV_B0;
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+ int is_b0 = falcon_rev(efx) >= FALCON_REV_B0;
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int iscsi_digest_en = is_b0;
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int iscsi_digest_en = is_b0;
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EFX_LOG(efx, "RX queue %d ring in special buffers %d-%d\n",
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EFX_LOG(efx, "RX queue %d ring in special buffers %d-%d\n",
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@@ -822,10 +822,10 @@ static inline void falcon_handle_tx_event(struct efx_channel *channel,
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tx_ev_q_label = EFX_QWORD_FIELD(*event, TX_EV_Q_LABEL);
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tx_ev_q_label = EFX_QWORD_FIELD(*event, TX_EV_Q_LABEL);
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tx_queue = &efx->tx_queue[tx_ev_q_label];
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tx_queue = &efx->tx_queue[tx_ev_q_label];
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- if (NET_DEV_REGISTERED(efx))
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+ if (efx_dev_registered(efx))
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netif_tx_lock(efx->net_dev);
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netif_tx_lock(efx->net_dev);
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falcon_notify_tx_desc(tx_queue);
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falcon_notify_tx_desc(tx_queue);
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- if (NET_DEV_REGISTERED(efx))
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+ if (efx_dev_registered(efx))
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netif_tx_unlock(efx->net_dev);
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netif_tx_unlock(efx->net_dev);
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} else if (EFX_QWORD_FIELD(*event, TX_EV_PKT_ERR) &&
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} else if (EFX_QWORD_FIELD(*event, TX_EV_PKT_ERR) &&
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EFX_WORKAROUND_10727(efx)) {
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EFX_WORKAROUND_10727(efx)) {
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@@ -884,7 +884,7 @@ static void falcon_handle_rx_not_ok(struct efx_rx_queue *rx_queue,
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RX_EV_TCP_UDP_CHKSUM_ERR);
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RX_EV_TCP_UDP_CHKSUM_ERR);
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rx_ev_eth_crc_err = EFX_QWORD_FIELD(*event, RX_EV_ETH_CRC_ERR);
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rx_ev_eth_crc_err = EFX_QWORD_FIELD(*event, RX_EV_ETH_CRC_ERR);
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rx_ev_frm_trunc = EFX_QWORD_FIELD(*event, RX_EV_FRM_TRUNC);
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rx_ev_frm_trunc = EFX_QWORD_FIELD(*event, RX_EV_FRM_TRUNC);
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- rx_ev_drib_nib = ((FALCON_REV(efx) >= FALCON_REV_B0) ?
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+ rx_ev_drib_nib = ((falcon_rev(efx) >= FALCON_REV_B0) ?
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0 : EFX_QWORD_FIELD(*event, RX_EV_DRIB_NIB));
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0 : EFX_QWORD_FIELD(*event, RX_EV_DRIB_NIB));
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rx_ev_pause_frm = EFX_QWORD_FIELD(*event, RX_EV_PAUSE_FRM_ERR);
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rx_ev_pause_frm = EFX_QWORD_FIELD(*event, RX_EV_PAUSE_FRM_ERR);
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@@ -1065,7 +1065,7 @@ static void falcon_handle_global_event(struct efx_channel *channel,
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EFX_QWORD_FIELD(*event, XG_PHY_INTR))
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EFX_QWORD_FIELD(*event, XG_PHY_INTR))
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is_phy_event = 1;
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is_phy_event = 1;
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- if ((FALCON_REV(efx) >= FALCON_REV_B0) &&
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+ if ((falcon_rev(efx) >= FALCON_REV_B0) &&
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EFX_OWORD_FIELD(*event, XG_MNT_INTR_B0))
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EFX_OWORD_FIELD(*event, XG_MNT_INTR_B0))
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is_phy_event = 1;
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is_phy_event = 1;
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@@ -1572,7 +1572,7 @@ static void falcon_setup_rss_indir_table(struct efx_nic *efx)
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unsigned long offset;
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unsigned long offset;
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efx_dword_t dword;
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efx_dword_t dword;
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- if (FALCON_REV(efx) < FALCON_REV_B0)
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+ if (falcon_rev(efx) < FALCON_REV_B0)
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return;
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return;
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for (offset = RX_RSS_INDIR_TBL_B0;
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for (offset = RX_RSS_INDIR_TBL_B0;
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@@ -1595,7 +1595,7 @@ int falcon_init_interrupt(struct efx_nic *efx)
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if (!EFX_INT_MODE_USE_MSI(efx)) {
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if (!EFX_INT_MODE_USE_MSI(efx)) {
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irq_handler_t handler;
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irq_handler_t handler;
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- if (FALCON_REV(efx) >= FALCON_REV_B0)
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+ if (falcon_rev(efx) >= FALCON_REV_B0)
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handler = falcon_legacy_interrupt_b0;
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handler = falcon_legacy_interrupt_b0;
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else
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else
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handler = falcon_legacy_interrupt_a1;
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handler = falcon_legacy_interrupt_a1;
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@@ -1642,7 +1642,7 @@ void falcon_fini_interrupt(struct efx_nic *efx)
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}
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}
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/* ACK legacy interrupt */
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/* ACK legacy interrupt */
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- if (FALCON_REV(efx) >= FALCON_REV_B0)
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+ if (falcon_rev(efx) >= FALCON_REV_B0)
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falcon_read(efx, ®, INT_ISR0_B0);
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falcon_read(efx, ®, INT_ISR0_B0);
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else
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else
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falcon_irq_ack_a1(efx);
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falcon_irq_ack_a1(efx);
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@@ -1733,7 +1733,7 @@ void falcon_drain_tx_fifo(struct efx_nic *efx)
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efx_oword_t temp;
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efx_oword_t temp;
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int count;
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int count;
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- if ((FALCON_REV(efx) < FALCON_REV_B0) ||
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+ if ((falcon_rev(efx) < FALCON_REV_B0) ||
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(efx->loopback_mode != LOOPBACK_NONE))
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(efx->loopback_mode != LOOPBACK_NONE))
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return;
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return;
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@@ -1786,7 +1786,7 @@ void falcon_deconfigure_mac_wrapper(struct efx_nic *efx)
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{
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{
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efx_oword_t temp;
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efx_oword_t temp;
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- if (FALCON_REV(efx) < FALCON_REV_B0)
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+ if (falcon_rev(efx) < FALCON_REV_B0)
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return;
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return;
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/* Isolate the MAC -> RX */
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/* Isolate the MAC -> RX */
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@@ -1824,7 +1824,7 @@ void falcon_reconfigure_mac_wrapper(struct efx_nic *efx)
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MAC_SPEED, link_speed);
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MAC_SPEED, link_speed);
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/* On B0, MAC backpressure can be disabled and packets get
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/* On B0, MAC backpressure can be disabled and packets get
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* discarded. */
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* discarded. */
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- if (FALCON_REV(efx) >= FALCON_REV_B0) {
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+ if (falcon_rev(efx) >= FALCON_REV_B0) {
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EFX_SET_OWORD_FIELD(reg, TXFIFO_DRAIN_EN_B0,
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EFX_SET_OWORD_FIELD(reg, TXFIFO_DRAIN_EN_B0,
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!efx->link_up);
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!efx->link_up);
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}
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}
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@@ -1842,7 +1842,7 @@ void falcon_reconfigure_mac_wrapper(struct efx_nic *efx)
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EFX_SET_OWORD_FIELD_VER(efx, reg, RX_XOFF_MAC_EN, tx_fc);
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EFX_SET_OWORD_FIELD_VER(efx, reg, RX_XOFF_MAC_EN, tx_fc);
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/* Unisolate the MAC -> RX */
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/* Unisolate the MAC -> RX */
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- if (FALCON_REV(efx) >= FALCON_REV_B0)
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+ if (falcon_rev(efx) >= FALCON_REV_B0)
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EFX_SET_OWORD_FIELD(reg, RX_INGR_EN_B0, 1);
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EFX_SET_OWORD_FIELD(reg, RX_INGR_EN_B0, 1);
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falcon_write(efx, ®, RX_CFG_REG_KER);
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falcon_write(efx, ®, RX_CFG_REG_KER);
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}
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}
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@@ -1857,7 +1857,7 @@ int falcon_dma_stats(struct efx_nic *efx, unsigned int done_offset)
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return 0;
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return 0;
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/* Statistics fetch will fail if the MAC is in TX drain */
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/* Statistics fetch will fail if the MAC is in TX drain */
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- if (FALCON_REV(efx) >= FALCON_REV_B0) {
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+ if (falcon_rev(efx) >= FALCON_REV_B0) {
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efx_oword_t temp;
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efx_oword_t temp;
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falcon_read(efx, &temp, MAC0_CTRL_REG_KER);
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falcon_read(efx, &temp, MAC0_CTRL_REG_KER);
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if (EFX_OWORD_FIELD(temp, TXFIFO_DRAIN_EN_B0))
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if (EFX_OWORD_FIELD(temp, TXFIFO_DRAIN_EN_B0))
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@@ -2114,7 +2114,7 @@ int falcon_probe_port(struct efx_nic *efx)
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falcon_init_mdio(&efx->mii);
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falcon_init_mdio(&efx->mii);
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/* Hardware flow ctrl. FalconA RX FIFO too small for pause generation */
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/* Hardware flow ctrl. FalconA RX FIFO too small for pause generation */
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- if (FALCON_REV(efx) >= FALCON_REV_B0)
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+ if (falcon_rev(efx) >= FALCON_REV_B0)
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efx->flow_control = EFX_FC_RX | EFX_FC_TX;
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efx->flow_control = EFX_FC_RX | EFX_FC_TX;
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else
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else
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efx->flow_control = EFX_FC_RX;
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efx->flow_control = EFX_FC_RX;
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@@ -2374,7 +2374,7 @@ static int falcon_probe_nic_variant(struct efx_nic *efx)
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return -ENODEV;
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return -ENODEV;
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}
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}
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- switch (FALCON_REV(efx)) {
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+ switch (falcon_rev(efx)) {
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case FALCON_REV_A0:
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case FALCON_REV_A0:
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case 0xff:
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case 0xff:
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EFX_ERR(efx, "Falcon rev A0 not supported\n");
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EFX_ERR(efx, "Falcon rev A0 not supported\n");
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@@ -2400,7 +2400,7 @@ static int falcon_probe_nic_variant(struct efx_nic *efx)
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break;
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break;
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default:
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default:
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- EFX_ERR(efx, "Unknown Falcon rev %d\n", FALCON_REV(efx));
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+ EFX_ERR(efx, "Unknown Falcon rev %d\n", falcon_rev(efx));
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return -ENODEV;
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return -ENODEV;
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}
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}
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@@ -2563,7 +2563,7 @@ int falcon_init_nic(struct efx_nic *efx)
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/* Set number of RSS queues for receive path. */
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/* Set number of RSS queues for receive path. */
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falcon_read(efx, &temp, RX_FILTER_CTL_REG);
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falcon_read(efx, &temp, RX_FILTER_CTL_REG);
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- if (FALCON_REV(efx) >= FALCON_REV_B0)
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+ if (falcon_rev(efx) >= FALCON_REV_B0)
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EFX_SET_OWORD_FIELD(temp, NUM_KER, 0);
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EFX_SET_OWORD_FIELD(temp, NUM_KER, 0);
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else
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else
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EFX_SET_OWORD_FIELD(temp, NUM_KER, efx->rss_queues - 1);
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EFX_SET_OWORD_FIELD(temp, NUM_KER, efx->rss_queues - 1);
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@@ -2601,7 +2601,7 @@ int falcon_init_nic(struct efx_nic *efx)
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/* Prefetch threshold 2 => fetch when descriptor cache half empty */
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/* Prefetch threshold 2 => fetch when descriptor cache half empty */
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EFX_SET_OWORD_FIELD(temp, TX_PREF_THRESHOLD, 2);
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EFX_SET_OWORD_FIELD(temp, TX_PREF_THRESHOLD, 2);
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/* Squash TX of packets of 16 bytes or less */
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/* Squash TX of packets of 16 bytes or less */
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- if (FALCON_REV(efx) >= FALCON_REV_B0 && EFX_WORKAROUND_9141(efx))
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+ if (falcon_rev(efx) >= FALCON_REV_B0 && EFX_WORKAROUND_9141(efx))
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EFX_SET_OWORD_FIELD(temp, TX_FLUSH_MIN_LEN_EN_B0, 1);
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EFX_SET_OWORD_FIELD(temp, TX_FLUSH_MIN_LEN_EN_B0, 1);
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falcon_write(efx, &temp, TX_CFG2_REG_KER);
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falcon_write(efx, &temp, TX_CFG2_REG_KER);
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@@ -2618,7 +2618,7 @@ int falcon_init_nic(struct efx_nic *efx)
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if (EFX_WORKAROUND_7575(efx))
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if (EFX_WORKAROUND_7575(efx))
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EFX_SET_OWORD_FIELD_VER(efx, temp, RX_USR_BUF_SIZE,
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EFX_SET_OWORD_FIELD_VER(efx, temp, RX_USR_BUF_SIZE,
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(3 * 4096) / 32);
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(3 * 4096) / 32);
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- if (FALCON_REV(efx) >= FALCON_REV_B0)
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+ if (falcon_rev(efx) >= FALCON_REV_B0)
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EFX_SET_OWORD_FIELD(temp, RX_INGR_EN_B0, 1);
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EFX_SET_OWORD_FIELD(temp, RX_INGR_EN_B0, 1);
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/* RX FIFO flow control thresholds */
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/* RX FIFO flow control thresholds */
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@@ -2634,7 +2634,7 @@ int falcon_init_nic(struct efx_nic *efx)
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falcon_write(efx, &temp, RX_CFG_REG_KER);
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falcon_write(efx, &temp, RX_CFG_REG_KER);
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/* Set destination of both TX and RX Flush events */
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/* Set destination of both TX and RX Flush events */
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- if (FALCON_REV(efx) >= FALCON_REV_B0) {
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+ if (falcon_rev(efx) >= FALCON_REV_B0) {
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EFX_POPULATE_OWORD_1(temp, FLS_EVQ_ID, 0);
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EFX_POPULATE_OWORD_1(temp, FLS_EVQ_ID, 0);
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falcon_write(efx, &temp, DP_CTRL_REG);
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falcon_write(efx, &temp, DP_CTRL_REG);
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}
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}
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