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@@ -154,6 +154,68 @@ static const char __init *pci_mmcfg_amd_fam10h(void)
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return "AMD Family 10h NB";
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return "AMD Family 10h NB";
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}
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}
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+static bool __initdata mcp55_checked;
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+static const char __init *pci_mmcfg_nvidia_mcp55(void)
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+{
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+ int bus;
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+ int mcp55_mmconf_found = 0;
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+
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+ static const u32 extcfg_regnum = 0x90;
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+ static const u32 extcfg_regsize = 4;
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+ static const u32 extcfg_enable_mask = 1<<31;
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+ static const u32 extcfg_start_mask = 0xff<<16;
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+ static const int extcfg_start_shift = 16;
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+ static const u32 extcfg_size_mask = 0x3<<28;
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+ static const int extcfg_size_shift = 28;
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+ static const int extcfg_sizebus[] = {0x100, 0x80, 0x40, 0x20};
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+ static const u32 extcfg_base_mask[] = {0x7ff8, 0x7ffc, 0x7ffe, 0x7fff};
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+ static const int extcfg_base_lshift = 25;
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+
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+ /*
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+ * do check if amd fam10h already took over
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+ */
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+ if (!acpi_disabled || pci_mmcfg_config_num || mcp55_checked)
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+ return NULL;
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+
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+ mcp55_checked = true;
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+ for (bus = 0; bus < 256; bus++) {
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+ u64 base;
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+ u32 l, extcfg;
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+ u16 vendor, device;
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+ int start, size_index, end;
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+
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+ raw_pci_ops->read(0, bus, PCI_DEVFN(0, 0), 0, 4, &l);
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+ vendor = l & 0xffff;
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+ device = (l >> 16) & 0xffff;
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+
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+ if (PCI_VENDOR_ID_NVIDIA != vendor || 0x0369 != device)
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+ continue;
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+
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+ raw_pci_ops->read(0, bus, PCI_DEVFN(0, 0), extcfg_regnum,
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+ extcfg_regsize, &extcfg);
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+
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+ if (!(extcfg & extcfg_enable_mask))
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+ continue;
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+
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+ if (extend_mmcfg(1) == -1)
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+ continue;
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+
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+ size_index = (extcfg & extcfg_size_mask) >> extcfg_size_shift;
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+ base = extcfg & extcfg_base_mask[size_index];
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+ /* base could > 4G */
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+ base <<= extcfg_base_lshift;
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+ start = (extcfg & extcfg_start_mask) >> extcfg_start_shift;
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+ end = start + extcfg_sizebus[size_index] - 1;
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+ fill_one_mmcfg(base, 0, start, end);
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+ mcp55_mmconf_found++;
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+ }
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+
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+ if (!mcp55_mmconf_found)
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+ return NULL;
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+
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+ return "nVidia MCP55";
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+}
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+
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struct pci_mmcfg_hostbridge_probe {
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struct pci_mmcfg_hostbridge_probe {
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u32 bus;
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u32 bus;
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u32 devfn;
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u32 devfn;
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@@ -171,6 +233,8 @@ static struct pci_mmcfg_hostbridge_probe pci_mmcfg_probes[] __initdata = {
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0x1200, pci_mmcfg_amd_fam10h },
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0x1200, pci_mmcfg_amd_fam10h },
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{ 0xff, PCI_DEVFN(0, 0), PCI_VENDOR_ID_AMD,
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{ 0xff, PCI_DEVFN(0, 0), PCI_VENDOR_ID_AMD,
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0x1200, pci_mmcfg_amd_fam10h },
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0x1200, pci_mmcfg_amd_fam10h },
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+ { 0, PCI_DEVFN(0, 0), PCI_VENDOR_ID_NVIDIA,
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+ 0x0369, pci_mmcfg_nvidia_mcp55 },
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};
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};
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static int __init pci_mmcfg_check_hostbridge(void)
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static int __init pci_mmcfg_check_hostbridge(void)
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