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@@ -196,6 +196,19 @@ static unsigned int ath9k_ioread32(void *hw_priv, u32 reg_offset)
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return val;
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}
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+static unsigned int __ath9k_reg_rmw(struct ath_softc *sc, u32 reg_offset,
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+ u32 set, u32 clr)
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+{
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+ u32 val;
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+
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+ val = ioread32(sc->mem + reg_offset);
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+ val &= ~clr;
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+ val |= set;
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+ iowrite32(val, sc->mem + reg_offset);
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+
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+ return val;
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+}
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+
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static unsigned int ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr)
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{
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struct ath_hw *ah = (struct ath_hw *) hw_priv;
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@@ -204,16 +217,12 @@ static unsigned int ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 cl
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unsigned long uninitialized_var(flags);
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u32 val;
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- if (ah->config.serialize_regmode == SER_REG_MODE_ON)
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+ if (ah->config.serialize_regmode == SER_REG_MODE_ON) {
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spin_lock_irqsave(&sc->sc_serial_rw, flags);
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-
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- val = ioread32(sc->mem + reg_offset);
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- val &= ~clr;
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- val |= set;
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- iowrite32(val, sc->mem + reg_offset);
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-
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- if (ah->config.serialize_regmode == SER_REG_MODE_ON)
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+ val = __ath9k_reg_rmw(sc, reg_offset, set, clr);
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spin_unlock_irqrestore(&sc->sc_serial_rw, flags);
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+ } else
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+ val = __ath9k_reg_rmw(sc, reg_offset, set, clr);
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return val;
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}
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