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@@ -120,10 +120,13 @@ static void _set_gpio_dataout_reg(struct gpio_bank *bank, int gpio, int enable)
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void __iomem *reg = bank->base;
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u32 l = GPIO_BIT(bank, gpio);
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- if (enable)
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+ if (enable) {
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reg += bank->regs->set_dataout;
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- else
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+ bank->context.dataout |= l;
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+ } else {
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reg += bank->regs->clr_dataout;
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+ bank->context.dataout &= ~l;
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+ }
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__raw_writel(l, reg);
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}
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@@ -144,18 +147,18 @@ static void _set_gpio_dataout_mask(struct gpio_bank *bank, int gpio, int enable)
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bank->context.dataout = l;
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}
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-static int _get_gpio_datain(struct gpio_bank *bank, int gpio)
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+static int _get_gpio_datain(struct gpio_bank *bank, int offset)
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{
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void __iomem *reg = bank->base + bank->regs->datain;
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- return (__raw_readl(reg) & GPIO_BIT(bank, gpio)) != 0;
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+ return (__raw_readl(reg) & (1 << offset)) != 0;
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}
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-static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)
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+static int _get_gpio_dataout(struct gpio_bank *bank, int offset)
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{
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void __iomem *reg = bank->base + bank->regs->dataout;
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- return (__raw_readl(reg) & GPIO_BIT(bank, gpio)) != 0;
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+ return (__raw_readl(reg) & (1 << offset)) != 0;
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}
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static inline void _gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set)
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@@ -245,7 +248,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
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}
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static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio,
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- int trigger)
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+ unsigned trigger)
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{
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void __iomem *base = bank->base;
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u32 gpio_bit = 1 << gpio;
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@@ -327,7 +330,8 @@ static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
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static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) {}
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#endif
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-static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
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+static int _set_gpio_triggering(struct gpio_bank *bank, int gpio,
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+ unsigned trigger)
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{
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void __iomem *reg = bank->base;
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void __iomem *base = bank->base;
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@@ -447,6 +451,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
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if (bank->regs->set_irqenable) {
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reg += bank->regs->set_irqenable;
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l = gpio_mask;
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+ bank->context.irqenable1 |= gpio_mask;
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} else {
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reg += bank->regs->irqenable;
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l = __raw_readl(reg);
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@@ -454,10 +459,10 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
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l &= ~gpio_mask;
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else
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l |= gpio_mask;
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+ bank->context.irqenable1 = l;
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}
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__raw_writel(l, reg);
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- bank->context.irqenable1 = l;
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}
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static void _disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
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@@ -468,6 +473,7 @@ static void _disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
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if (bank->regs->clr_irqenable) {
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reg += bank->regs->clr_irqenable;
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l = gpio_mask;
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+ bank->context.irqenable1 &= ~gpio_mask;
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} else {
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reg += bank->regs->irqenable;
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l = __raw_readl(reg);
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@@ -475,15 +481,18 @@ static void _disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
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l |= gpio_mask;
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else
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l &= ~gpio_mask;
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+ bank->context.irqenable1 = l;
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}
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__raw_writel(l, reg);
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- bank->context.irqenable1 = l;
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}
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static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int enable)
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{
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- _enable_gpio_irqbank(bank, GPIO_BIT(bank, gpio));
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+ if (enable)
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+ _enable_gpio_irqbank(bank, GPIO_BIT(bank, gpio));
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+ else
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+ _disable_gpio_irqbank(bank, GPIO_BIT(bank, gpio));
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}
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/*
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@@ -511,6 +520,7 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
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else
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bank->suspend_wakeup &= ~gpio_bit;
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+ __raw_writel(bank->suspend_wakeup, bank->base + bank->regs->wkup_en);
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spin_unlock_irqrestore(&bank->lock, flags);
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return 0;
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@@ -855,19 +865,15 @@ static int gpio_is_input(struct gpio_bank *bank, int mask)
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static int gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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struct gpio_bank *bank;
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- void __iomem *reg;
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- int gpio;
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u32 mask;
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- gpio = chip->base + offset;
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bank = container_of(chip, struct gpio_bank, chip);
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- reg = bank->base;
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- mask = GPIO_BIT(bank, gpio);
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+ mask = (1 << offset);
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if (gpio_is_input(bank, mask))
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- return _get_gpio_datain(bank, gpio);
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+ return _get_gpio_datain(bank, offset);
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else
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- return _get_gpio_dataout(bank, gpio);
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+ return _get_gpio_dataout(bank, offset);
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}
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static int gpio_output(struct gpio_chip *chip, unsigned offset, int value)
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@@ -1239,9 +1245,6 @@ static int omap_gpio_runtime_suspend(struct device *dev)
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* non-wakeup GPIOs. Otherwise spurious IRQs will be
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* generated. See OMAP2420 Errata item 1.101.
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*/
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- if (!(bank->enabled_non_wakeup_gpios))
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- goto update_gpio_context_count;
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-
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bank->saved_datain = __raw_readl(bank->base +
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bank->regs->datain);
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l1 = __raw_readl(bank->base + bank->regs->fallingdetect);
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@@ -1290,7 +1293,7 @@ static int omap_gpio_runtime_resume(struct device *dev)
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__raw_writel(bank->context.risingdetect,
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bank->base + bank->regs->risingdetect);
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- if (!bank->enabled_non_wakeup_gpios || !bank->workaround_enabled) {
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+ if (!bank->workaround_enabled) {
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spin_unlock_irqrestore(&bank->lock, flags);
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return 0;
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}
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