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@@ -11,36 +11,22 @@
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* - bits 0-7 are the preemption count (max preemption depth: 256)
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* - bits 8-15 are the softirq count (max # of softirqs: 256)
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*
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- * The hardirq count can in theory reach the same as NR_IRQS.
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- * In reality, the number of nested IRQS is limited to the stack
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- * size as well. For archs with over 1000 IRQS it is not practical
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- * to expect that they will all nest. We give a max of 10 bits for
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- * hardirq nesting. An arch may choose to give less than 10 bits.
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- * m68k expects it to be 8.
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- *
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- * - bits 16-25 are the hardirq count (max # of nested hardirqs: 1024)
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- * - bit 26 is the NMI_MASK
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- * - bit 27 is the PREEMPT_ACTIVE flag
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+ * The hardirq count could in theory be the same as the number of
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+ * interrupts in the system, but we run all interrupt handlers with
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+ * interrupts disabled, so we cannot have nesting interrupts. Though
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+ * there are a few palaeontologic drivers which reenable interrupts in
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+ * the handler, so we need more than one bit here.
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*
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* PREEMPT_MASK: 0x000000ff
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* SOFTIRQ_MASK: 0x0000ff00
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- * HARDIRQ_MASK: 0x03ff0000
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- * NMI_MASK: 0x04000000
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+ * HARDIRQ_MASK: 0x000f0000
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+ * NMI_MASK: 0x00100000
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*/
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#define PREEMPT_BITS 8
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#define SOFTIRQ_BITS 8
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+#define HARDIRQ_BITS 4
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#define NMI_BITS 1
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-#define MAX_HARDIRQ_BITS 10
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-
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-#ifndef HARDIRQ_BITS
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-# define HARDIRQ_BITS MAX_HARDIRQ_BITS
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-#endif
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-
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-#if HARDIRQ_BITS > MAX_HARDIRQ_BITS
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-#error HARDIRQ_BITS too high!
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-#endif
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-
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#define PREEMPT_SHIFT 0
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#define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS)
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#define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS)
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