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@@ -88,7 +88,7 @@
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#define INT_SYS_STATS_MON (INT_SEC_BASE + 22)
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#define INT_GPIO5 (INT_SEC_BASE + 23)
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#define INT_CPU0_PMU_INTR (INT_SEC_BASE + 24)
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-#define INT_CPU2_PMU_INTR (INT_SEC_BASE + 25)
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+#define INT_CPU1_PMU_INTR (INT_SEC_BASE + 25)
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#define INT_SEC_RES_26 (INT_SEC_BASE + 26)
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#define INT_S_LINK1 (INT_SEC_BASE + 27)
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#define INT_APB_DMA_COP (INT_SEC_BASE + 28)
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@@ -166,10 +166,18 @@
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#define INT_QUAD_RES_30 (INT_QUAD_BASE + 30)
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#define INT_QUAD_RES_31 (INT_QUAD_BASE + 31)
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-#define INT_GPIO_BASE (INT_QUAD_BASE + 32)
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+#define INT_MAIN_NR (INT_QUAD_BASE + 32 - INT_PRI_BASE)
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+
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+#define INT_GPIO_BASE (INT_PRI_BASE + INT_MAIN_NR)
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+
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#define INT_GPIO_NR (28 * 8)
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-#define NR_IRQS (INT_GPIO_BASE + INT_GPIO_NR)
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+#define TEGRA_NR_IRQS (INT_GPIO_BASE + INT_GPIO_NR)
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+
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+#define INT_BOARD_BASE TEGRA_NR_IRQS
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+#define NR_BOARD_IRQS 32
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+
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+#define NR_IRQS (INT_BOARD_BASE + NR_BOARD_IRQS)
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#endif
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#endif
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