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@@ -11,6 +11,8 @@
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#include <linux/ssb/ssb.h>
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#include <linux/ssb/ssb_embedded.h>
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+#include "ssb_private.h"
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+
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int ssb_watchdog_timer_set(struct ssb_bus *bus, u32 ticks)
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{
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@@ -24,3 +26,107 @@ int ssb_watchdog_timer_set(struct ssb_bus *bus, u32 ticks)
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}
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return -ENODEV;
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}
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+
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+u32 ssb_gpio_in(struct ssb_bus *bus, u32 mask)
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+{
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+ unsigned long flags;
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+ u32 res = 0;
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+
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+ spin_lock_irqsave(&bus->gpio_lock, flags);
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+ if (ssb_chipco_available(&bus->chipco))
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+ res = ssb_chipco_gpio_in(&bus->chipco, mask);
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+ else if (ssb_extif_available(&bus->extif))
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+ res = ssb_extif_gpio_in(&bus->extif, mask);
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+ else
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+ SSB_WARN_ON(1);
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+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
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+
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+ return res;
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+}
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+EXPORT_SYMBOL(ssb_gpio_in);
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+
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+u32 ssb_gpio_out(struct ssb_bus *bus, u32 mask, u32 value)
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+{
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+ unsigned long flags;
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+ u32 res = 0;
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+
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+ spin_lock_irqsave(&bus->gpio_lock, flags);
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+ if (ssb_chipco_available(&bus->chipco))
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+ res = ssb_chipco_gpio_out(&bus->chipco, mask, value);
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+ else if (ssb_extif_available(&bus->extif))
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+ res = ssb_extif_gpio_out(&bus->extif, mask, value);
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+ else
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+ SSB_WARN_ON(1);
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+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
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+
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+ return res;
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+}
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+EXPORT_SYMBOL(ssb_gpio_out);
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+
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+u32 ssb_gpio_outen(struct ssb_bus *bus, u32 mask, u32 value)
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+{
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+ unsigned long flags;
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+ u32 res = 0;
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+
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+ spin_lock_irqsave(&bus->gpio_lock, flags);
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+ if (ssb_chipco_available(&bus->chipco))
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+ res = ssb_chipco_gpio_outen(&bus->chipco, mask, value);
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+ else if (ssb_extif_available(&bus->extif))
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+ res = ssb_extif_gpio_outen(&bus->extif, mask, value);
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+ else
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+ SSB_WARN_ON(1);
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+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
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+
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+ return res;
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+}
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+EXPORT_SYMBOL(ssb_gpio_outen);
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+
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+u32 ssb_gpio_control(struct ssb_bus *bus, u32 mask, u32 value)
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+{
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+ unsigned long flags;
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+ u32 res = 0;
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+
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+ spin_lock_irqsave(&bus->gpio_lock, flags);
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+ if (ssb_chipco_available(&bus->chipco))
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+ res = ssb_chipco_gpio_control(&bus->chipco, mask, value);
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+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
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+
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+ return res;
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+}
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+EXPORT_SYMBOL(ssb_gpio_control);
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+
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+u32 ssb_gpio_intmask(struct ssb_bus *bus, u32 mask, u32 value)
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+{
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+ unsigned long flags;
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+ u32 res = 0;
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+
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+ spin_lock_irqsave(&bus->gpio_lock, flags);
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+ if (ssb_chipco_available(&bus->chipco))
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+ res = ssb_chipco_gpio_intmask(&bus->chipco, mask, value);
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+ else if (ssb_extif_available(&bus->extif))
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+ res = ssb_extif_gpio_intmask(&bus->extif, mask, value);
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+ else
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+ SSB_WARN_ON(1);
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+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
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+
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+ return res;
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+}
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+EXPORT_SYMBOL(ssb_gpio_intmask);
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+
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+u32 ssb_gpio_polarity(struct ssb_bus *bus, u32 mask, u32 value)
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+{
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+ unsigned long flags;
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+ u32 res = 0;
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+
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+ spin_lock_irqsave(&bus->gpio_lock, flags);
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+ if (ssb_chipco_available(&bus->chipco))
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+ res = ssb_chipco_gpio_polarity(&bus->chipco, mask, value);
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+ else if (ssb_extif_available(&bus->extif))
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+ res = ssb_extif_gpio_polarity(&bus->extif, mask, value);
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+ else
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+ SSB_WARN_ON(1);
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+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
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+
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+ return res;
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+}
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+EXPORT_SYMBOL(ssb_gpio_polarity);
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