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@@ -477,6 +477,23 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
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struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(cpu_dai);
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void __iomem *base = dev->base;
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+ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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+ case SND_SOC_DAIFMT_DSP_B:
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+ case SND_SOC_DAIFMT_AC97:
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+ mcasp_clr_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);
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+ mcasp_clr_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);
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+ break;
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+ default:
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+ /* configure a full-word SYNC pulse (LRCLK) */
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+ mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);
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+ mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);
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+
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+ /* make 1st data bit occur one ACLK cycle after the frame sync */
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+ mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, FSXDLY(1));
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+ mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, FSRDLY(1));
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+ break;
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+ }
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+
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBS_CFS:
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/* codec is clock and frame slave */
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@@ -765,8 +782,6 @@ static void davinci_hw_param(struct davinci_audio_dev *dev, int stream)
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else
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printk(KERN_ERR "playback tdm slot %d not supported\n",
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dev->tdm_slots);
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-
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- mcasp_clr_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);
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} else {
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/* bit stream is MSB first with no delay */
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/* DSP_B mode */
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@@ -779,8 +794,6 @@ static void davinci_hw_param(struct davinci_audio_dev *dev, int stream)
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else
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printk(KERN_ERR "capture tdm slot %d not supported\n",
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dev->tdm_slots);
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-
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- mcasp_clr_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);
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}
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}
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