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@@ -314,7 +314,7 @@ void __init get_mtrr_state(void)
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if (mtrr_state.have_fixed)
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get_fixed_ranges(mtrr_state.fixed_ranges);
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- rdmsr(MTRRdefType_MSR, lo, dummy);
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+ rdmsr(MSR_MTRRdefType, lo, dummy);
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mtrr_state.def_type = (lo & 0xff);
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mtrr_state.enabled = (lo & 0xc00) >> 10;
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@@ -579,10 +579,10 @@ static void prepare_set(void) __acquires(set_atomicity_lock)
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__flush_tlb();
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/* Save MTRR state */
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- rdmsr(MTRRdefType_MSR, deftype_lo, deftype_hi);
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+ rdmsr(MSR_MTRRdefType, deftype_lo, deftype_hi);
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/* Disable MTRRs, and set the default type to uncached */
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- mtrr_wrmsr(MTRRdefType_MSR, deftype_lo & ~0xcff, deftype_hi);
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+ mtrr_wrmsr(MSR_MTRRdefType, deftype_lo & ~0xcff, deftype_hi);
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}
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static void post_set(void) __releases(set_atomicity_lock)
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@@ -591,7 +591,7 @@ static void post_set(void) __releases(set_atomicity_lock)
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__flush_tlb();
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/* Intel (P6) standard MTRRs */
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- mtrr_wrmsr(MTRRdefType_MSR, deftype_lo, deftype_hi);
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+ mtrr_wrmsr(MSR_MTRRdefType, deftype_lo, deftype_hi);
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/* Enable caches */
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write_cr0(read_cr0() & 0xbfffffff);
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