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@@ -32,7 +32,7 @@
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*/
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/*
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* This file contains all of the code that is specific to the
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- * InfiniPath PE-800 chip.
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+ * InfiniPath PCIe chip.
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*/
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#include <linux/interrupt.h>
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@@ -45,9 +45,9 @@
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/*
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* This file contains all the chip-specific register information and
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- * access functions for the QLogic InfiniPath PE800, the PCI-Express chip.
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+ * access functions for the QLogic InfiniPath PCI-Express chip.
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*
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- * This lists the InfiniPath PE800 registers, in the actual chip layout.
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+ * This lists the InfiniPath registers, in the actual chip layout.
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* This structure should never be directly accessed.
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*/
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struct _infinipath_do_not_use_kernel_regs {
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@@ -213,7 +213,6 @@ static const struct ipath_kregs ipath_pe_kregs = {
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.kr_rcvhdraddr = IPATH_KREG_OFFSET(RcvHdrAddr0),
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.kr_rcvhdrtailaddr = IPATH_KREG_OFFSET(RcvHdrTailAddr0),
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- /* This group is pe-800-specific; and used only in this file */
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/* The rcvpktled register controls one of the debug port signals, so
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* a packet activity LED can be connected to it. */
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.kr_rcvpktledcnt = IPATH_KREG_OFFSET(RcvPktLEDCnt),
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@@ -388,7 +387,7 @@ static void ipath_pe_handle_hwerrors(struct ipath_devdata *dd, char *msg,
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*msg = '\0';
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if (hwerrs & INFINIPATH_HWE_MEMBISTFAILED) {
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- strlcat(msg, "[Memory BIST test failed, PE-800 unusable]",
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+ strlcat(msg, "[Memory BIST test failed, InfiniPath hardware unusable]",
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msgl);
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/* ignore from now on, so disable until driver reloaded */
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*dd->ipath_statusp |= IPATH_STATUS_HWERROR;
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@@ -433,7 +432,7 @@ static void ipath_pe_handle_hwerrors(struct ipath_devdata *dd, char *msg,
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if (hwerrs & _IPATH_PLL_FAIL) {
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snprintf(bitsmsg, sizeof bitsmsg,
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- "[PLL failed (%llx), PE-800 unusable]",
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+ "[PLL failed (%llx), InfiniPath hardware unusable]",
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(unsigned long long) hwerrs & _IPATH_PLL_FAIL);
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strlcat(msg, bitsmsg, msgl);
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/* ignore from now on, so disable until driver reloaded */
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@@ -511,22 +510,25 @@ static int ipath_pe_boardname(struct ipath_devdata *dd, char *name,
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n = "InfiniPath_Emulation";
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break;
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case 1:
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- n = "InfiniPath_PE-800-Bringup";
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+ n = "InfiniPath_QLE7140-Bringup";
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break;
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case 2:
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- n = "InfiniPath_PE-880";
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+ n = "InfiniPath_QLE7140";
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break;
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case 3:
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- n = "InfiniPath_PE-850";
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+ n = "InfiniPath_QMI7140";
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break;
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case 4:
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- n = "InfiniPath_PE-860";
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+ n = "InfiniPath_QEM7140";
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+ break;
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+ case 5:
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+ n = "InfiniPath_QMH7140";
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break;
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default:
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ipath_dev_err(dd,
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"Don't yet know about board with ID %u\n",
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boardrev);
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- snprintf(name, namelen, "Unknown_InfiniPath_PE-8xx_%u",
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+ snprintf(name, namelen, "Unknown_InfiniPath_PCIe_%u",
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boardrev);
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break;
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}
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@@ -534,7 +536,7 @@ static int ipath_pe_boardname(struct ipath_devdata *dd, char *name,
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snprintf(name, namelen, "%s", n);
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if (dd->ipath_majrev != 4 || !dd->ipath_minrev || dd->ipath_minrev>2) {
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- ipath_dev_err(dd, "Unsupported PE-800 revision %u.%u!\n",
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+ ipath_dev_err(dd, "Unsupported InfiniPath hardware revision %u.%u!\n",
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dd->ipath_majrev, dd->ipath_minrev);
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ret = 1;
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} else
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@@ -705,7 +707,7 @@ static void ipath_pe_quiet_serdes(struct ipath_devdata *dd)
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ipath_write_kreg(dd, dd->ipath_kregs->kr_serdesconfig0, val);
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}
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-/* this is not yet needed on the PE800, so just return 0. */
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+/* this is not yet needed on this chip, so just return 0. */
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static int ipath_pe_intconfig(struct ipath_devdata *dd)
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{
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return 0;
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@@ -759,8 +761,8 @@ static void ipath_setup_pe_setextled(struct ipath_devdata *dd, u64 lst,
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*
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* This is called during driver unload.
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* We do the pci_disable_msi here, not in generic code, because it
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- * isn't used for the HT-400. If we do end up needing pci_enable_msi
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- * at some point in the future for HT-400, we'll move the call back
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+ * isn't used for the HT chips. If we do end up needing pci_enable_msi
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+ * at some point in the future for HT, we'll move the call back
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* into the main init_one code.
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*/
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static void ipath_setup_pe_cleanup(struct ipath_devdata *dd)
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@@ -780,10 +782,10 @@ static void ipath_setup_pe_cleanup(struct ipath_devdata *dd)
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* late in 2.6.16).
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* All that can be done is to edit the kernel source to remove the quirk
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* check until that is fixed.
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- * We do not need to call enable_msi() for our HyperTransport chip (HT-400),
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- * even those it uses MSI, and we want to avoid the quirk warning, so
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- * So we call enable_msi only for the PE-800. If we do end up needing
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- * pci_enable_msi at some point in the future for HT-400, we'll move the
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+ * We do not need to call enable_msi() for our HyperTransport chip,
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+ * even though it uses MSI, and we want to avoid the quirk warning, so
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+ * So we call enable_msi only for PCIe. If we do end up needing
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+ * pci_enable_msi at some point in the future for HT, we'll move the
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* call back into the main init_one code.
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* We save the msi lo and hi values, so we can restore them after
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* chip reset (the kernel PCI infrastructure doesn't yet handle that
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@@ -971,8 +973,7 @@ static int ipath_setup_pe_reset(struct ipath_devdata *dd)
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int ret;
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/* Use ERROR so it shows up in logs, etc. */
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- ipath_dev_err(dd, "Resetting PE-800 unit %u\n",
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- dd->ipath_unit);
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+ ipath_dev_err(dd, "Resetting InfiniPath unit %u\n", dd->ipath_unit);
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/* keep chip from being accessed in a few places */
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dd->ipath_flags &= ~(IPATH_INITTED|IPATH_PRESENT);
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val = dd->ipath_control | INFINIPATH_C_RESET;
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@@ -1078,7 +1079,7 @@ static void ipath_pe_put_tid(struct ipath_devdata *dd, u64 __iomem *tidptr,
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* @port: the port
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*
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* clear all TID entries for a port, expected and eager.
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- * Used from ipath_close(). On PE800, TIDs are only 32 bits,
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+ * Used from ipath_close(). On this chip, TIDs are only 32 bits,
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* not 64, but they are still on 64 bit boundaries, so tidbase
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* is declared as u64 * for the pointer math, even though we write 32 bits
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*/
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@@ -1148,9 +1149,9 @@ static int ipath_pe_early_init(struct ipath_devdata *dd)
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dd->ipath_flags |= IPATH_4BYTE_TID;
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/*
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- * For openib, we need to be able to handle an IB header of 96 bytes
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- * or 24 dwords. HT-400 has arbitrary sized receive buffers, so we
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- * made them the same size as the PIO buffers. The PE-800 does not
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+ * For openfabrics, we need to be able to handle an IB header of
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+ * 24 dwords. HT chip has arbitrary sized receive buffers, so we
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+ * made them the same size as the PIO buffers. This chip does not
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* handle arbitrary size buffers, so we need the header large enough
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* to handle largest IB header, but still have room for a 2KB MTU
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* standard IB packet.
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@@ -1158,11 +1159,10 @@ static int ipath_pe_early_init(struct ipath_devdata *dd)
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dd->ipath_rcvhdrentsize = 24;
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dd->ipath_rcvhdrsize = IPATH_DFLT_RCVHDRSIZE;
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- /* For HT-400, we allocate a somewhat overly large eager buffer,
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- * such that we can guarantee that we can receive the largest packet
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- * that we can send out. To truly support a 4KB MTU, we need to
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- * bump this to a larger value. We'll do this when I get around to
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- * testing 4KB sends on the PE-800, which I have not yet done.
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+ /*
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+ * To truly support a 4KB MTU (for usermode), we need to
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+ * bump this to a larger value. For now, we use them for
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+ * the kernel only.
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*/
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dd->ipath_rcvegrbufsize = 2048;
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/*
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@@ -1175,9 +1175,9 @@ static int ipath_pe_early_init(struct ipath_devdata *dd)
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dd->ipath_init_ibmaxlen = dd->ipath_ibmaxlen;
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/*
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- * For PE-800, we can request a receive interrupt for 1 or
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+ * We can request a receive interrupt for 1 or
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* more packets from current offset. For now, we set this
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- * up for a single packet, to match the HT-400 behavior.
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+ * up for a single packet.
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*/
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dd->ipath_rhdrhead_intr_off = 1ULL<<32;
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@@ -1216,13 +1216,13 @@ static int ipath_pe_get_base_info(struct ipath_portdata *pd, void *kbase)
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}
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/**
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- * ipath_init_pe800_funcs - set up the chip-specific function pointers
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+ * ipath_init_iba6120_funcs - set up the chip-specific function pointers
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* @dd: the infinipath device
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*
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* This is global, and is called directly at init to set up the
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* chip-specific function pointers for later use.
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*/
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-void ipath_init_pe800_funcs(struct ipath_devdata *dd)
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+void ipath_init_iba6120_funcs(struct ipath_devdata *dd)
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{
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dd->ipath_f_intrsetup = ipath_pe_intconfig;
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dd->ipath_f_bus = ipath_setup_pe_config;
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