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@@ -14,6 +14,8 @@
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#ifndef __PXA2XX_REGS_H
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#ifndef __PXA2XX_REGS_H
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#define __PXA2XX_REGS_H
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#define __PXA2XX_REGS_H
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+#include <mach/pxa-regs.h>
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+
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/*
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/*
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* Memory controller
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* Memory controller
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*/
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*/
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@@ -69,24 +71,6 @@
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#define MDREFR_K0RUN (1 << 13) /* SDCLK0 Run Control/Status */
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#define MDREFR_K0RUN (1 << 13) /* SDCLK0 Run Control/Status */
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#define MDREFR_E0PIN (1 << 12) /* SDCKE0 Level Control/Status */
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#define MDREFR_E0PIN (1 << 12) /* SDCKE0 Level Control/Status */
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-
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-#ifdef CONFIG_PXA27x
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-
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-#define ARB_CNTRL __REG(0x48000048) /* Arbiter Control Register */
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-
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-#define ARB_DMA_SLV_PARK (1<<31) /* Be parked with DMA slave when idle */
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-#define ARB_CI_PARK (1<<30) /* Be parked with Camera Interface when idle */
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-#define ARB_EX_MEM_PARK (1<<29) /* Be parked with external MEMC when idle */
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-#define ARB_INT_MEM_PARK (1<<28) /* Be parked with internal MEMC when idle */
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-#define ARB_USB_PARK (1<<27) /* Be parked with USB when idle */
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-#define ARB_LCD_PARK (1<<26) /* Be parked with LCD when idle */
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-#define ARB_DMA_PARK (1<<25) /* Be parked with DMA when idle */
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-#define ARB_CORE_PARK (1<<24) /* Be parked with core when idle */
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-#define ARB_LOCK_FLAG (1<<23) /* Only Locking masters gain access to the bus */
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-
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-#endif
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-
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-
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/*
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/*
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* Power Manager
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* Power Manager
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*/
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*/
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