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@@ -276,15 +276,32 @@ exit:
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/**
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* load_i2c_mcr_reg() - load the MCR register
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* @dev: private data of controller
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+ * @flags: message flags
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*/
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-static u32 load_i2c_mcr_reg(struct nmk_i2c_dev *dev)
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+static u32 load_i2c_mcr_reg(struct nmk_i2c_dev *dev, u16 flags)
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{
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u32 mcr = 0;
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+ unsigned short slave_adr_3msb_bits;
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- /* 7-bit address transaction */
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- mcr |= GEN_MASK(1, I2C_MCR_AM, 12);
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mcr |= GEN_MASK(dev->cli.slave_adr, I2C_MCR_A7, 1);
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+ if (unlikely(flags & I2C_M_TEN)) {
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+ /* 10-bit address transaction */
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+ mcr |= GEN_MASK(2, I2C_MCR_AM, 12);
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+ /*
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+ * Get the top 3 bits.
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+ * EA10 represents extended address in MCR. This includes
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+ * the extension (MSB bits) of the 7 bit address loaded
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+ * in A7
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+ */
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+ slave_adr_3msb_bits = (dev->cli.slave_adr >> 7) & 0x7;
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+
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+ mcr |= GEN_MASK(slave_adr_3msb_bits, I2C_MCR_EA10, 8);
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+ } else {
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+ /* 7-bit address transaction */
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+ mcr |= GEN_MASK(1, I2C_MCR_AM, 12);
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+ }
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+
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/* start byte procedure not applied */
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mcr |= GEN_MASK(0, I2C_MCR_SB, 11);
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@@ -381,19 +398,20 @@ static void setup_i2c_controller(struct nmk_i2c_dev *dev)
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/**
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* read_i2c() - Read from I2C client device
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* @dev: private data of I2C Driver
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+ * @flags: message flags
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*
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* This function reads from i2c client device when controller is in
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* master mode. There is a completion timeout. If there is no transfer
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* before timeout error is returned.
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*/
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-static int read_i2c(struct nmk_i2c_dev *dev)
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+static int read_i2c(struct nmk_i2c_dev *dev, u16 flags)
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{
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u32 status = 0;
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u32 mcr;
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u32 irq_mask = 0;
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int timeout;
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- mcr = load_i2c_mcr_reg(dev);
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+ mcr = load_i2c_mcr_reg(dev, flags);
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writel(mcr, dev->virtbase + I2C_MCR);
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/* load the current CR value */
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@@ -459,17 +477,18 @@ static void fill_tx_fifo(struct nmk_i2c_dev *dev, int no_bytes)
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/**
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* write_i2c() - Write data to I2C client.
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* @dev: private data of I2C Driver
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+ * @flags: message flags
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*
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* This function writes data to I2C client
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*/
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-static int write_i2c(struct nmk_i2c_dev *dev)
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+static int write_i2c(struct nmk_i2c_dev *dev, u16 flags)
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{
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u32 status = 0;
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u32 mcr;
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u32 irq_mask = 0;
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int timeout;
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- mcr = load_i2c_mcr_reg(dev);
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+ mcr = load_i2c_mcr_reg(dev, flags);
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writel(mcr, dev->virtbase + I2C_MCR);
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@@ -538,11 +557,11 @@ static int nmk_i2c_xfer_one(struct nmk_i2c_dev *dev, u16 flags)
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if (flags & I2C_M_RD) {
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/* read operation */
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dev->cli.operation = I2C_READ;
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- status = read_i2c(dev);
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+ status = read_i2c(dev, flags);
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} else {
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/* write operation */
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dev->cli.operation = I2C_WRITE;
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- status = write_i2c(dev);
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+ status = write_i2c(dev, flags);
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}
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if (status || (dev->result)) {
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@@ -644,13 +663,6 @@ static int nmk_i2c_xfer(struct i2c_adapter *i2c_adap,
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setup_i2c_controller(dev);
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for (i = 0; i < num_msgs; i++) {
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- if (unlikely(msgs[i].flags & I2C_M_TEN)) {
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- dev_err(&dev->adev->dev,
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- "10 bit addressing not supported\n");
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-
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- status = -EINVAL;
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- goto out;
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- }
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dev->cli.slave_adr = msgs[i].addr;
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dev->cli.buffer = msgs[i].buf;
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dev->cli.count = msgs[i].len;
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@@ -891,7 +903,7 @@ static const struct dev_pm_ops nmk_i2c_pm = {
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static unsigned int nmk_i2c_functionality(struct i2c_adapter *adap)
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{
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- return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
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+ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR;
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}
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static const struct i2c_algorithm nmk_i2c_algo = {
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