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@@ -928,6 +928,7 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
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struct coh901318_chan *cohc = to_coh901318_chan(chan);
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struct coh901318_chan *cohc = to_coh901318_chan(chan);
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struct coh901318_lli *data;
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struct coh901318_lli *data;
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struct coh901318_desc *cohd;
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struct coh901318_desc *cohd;
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+ const struct coh901318_params *params;
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struct scatterlist *sg;
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struct scatterlist *sg;
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int len = 0;
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int len = 0;
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int size;
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int size;
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@@ -935,6 +936,7 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
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u32 ctrl_chained = cohc_chan_param(cohc)->ctrl_lli_chained;
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u32 ctrl_chained = cohc_chan_param(cohc)->ctrl_lli_chained;
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u32 ctrl = cohc_chan_param(cohc)->ctrl_lli;
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u32 ctrl = cohc_chan_param(cohc)->ctrl_lli;
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u32 ctrl_last = cohc_chan_param(cohc)->ctrl_lli_last;
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u32 ctrl_last = cohc_chan_param(cohc)->ctrl_lli_last;
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+ u32 config;
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unsigned long flg;
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unsigned long flg;
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int ret;
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int ret;
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@@ -952,10 +954,14 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
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/* Trigger interrupt after last lli */
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/* Trigger interrupt after last lli */
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ctrl_last |= COH901318_CX_CTRL_TC_IRQ_ENABLE;
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ctrl_last |= COH901318_CX_CTRL_TC_IRQ_ENABLE;
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+ params = cohc_chan_param(cohc);
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+ config = params->config;
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+
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if (direction == DMA_TO_DEVICE) {
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if (direction == DMA_TO_DEVICE) {
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u32 tx_flags = COH901318_CX_CTRL_PRDD_SOURCE |
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u32 tx_flags = COH901318_CX_CTRL_PRDD_SOURCE |
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COH901318_CX_CTRL_SRC_ADDR_INC_ENABLE;
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COH901318_CX_CTRL_SRC_ADDR_INC_ENABLE;
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+ config |= COH901318_CX_CFG_RM_MEMORY_TO_PRIMARY;
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ctrl_chained |= tx_flags;
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ctrl_chained |= tx_flags;
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ctrl_last |= tx_flags;
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ctrl_last |= tx_flags;
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ctrl |= tx_flags;
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ctrl |= tx_flags;
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@@ -963,12 +969,15 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
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u32 rx_flags = COH901318_CX_CTRL_PRDD_DEST |
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u32 rx_flags = COH901318_CX_CTRL_PRDD_DEST |
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COH901318_CX_CTRL_DST_ADDR_INC_ENABLE;
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COH901318_CX_CTRL_DST_ADDR_INC_ENABLE;
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+ config |= COH901318_CX_CFG_RM_PRIMARY_TO_MEMORY;
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ctrl_chained |= rx_flags;
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ctrl_chained |= rx_flags;
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ctrl_last |= rx_flags;
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ctrl_last |= rx_flags;
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ctrl |= rx_flags;
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ctrl |= rx_flags;
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} else
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} else
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goto err_direction;
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goto err_direction;
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+ coh901318_set_conf(cohc, config);
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+
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/* The dma only supports transmitting packages up to
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/* The dma only supports transmitting packages up to
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* MAX_DMA_PACKET_SIZE. Calculate to total number of
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* MAX_DMA_PACKET_SIZE. Calculate to total number of
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* dma elemts required to send the entire sg list
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* dma elemts required to send the entire sg list
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@@ -1250,6 +1259,11 @@ static int __init coh901318_probe(struct platform_device *pdev)
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base->dma_memcpy.device_issue_pending = coh901318_issue_pending;
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base->dma_memcpy.device_issue_pending = coh901318_issue_pending;
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base->dma_memcpy.device_terminate_all = coh901318_terminate_all;
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base->dma_memcpy.device_terminate_all = coh901318_terminate_all;
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base->dma_memcpy.dev = &pdev->dev;
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base->dma_memcpy.dev = &pdev->dev;
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+ /*
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+ * This controller can only access address at even 32bit boundaries,
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+ * i.e. 2^2
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+ */
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+ base->dma_memcpy.copy_align = 2;
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err = dma_async_device_register(&base->dma_memcpy);
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err = dma_async_device_register(&base->dma_memcpy);
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if (err)
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if (err)
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