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@@ -213,7 +213,7 @@ EXPORT_SYMBOL(clk_set_parent);
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/* base clocks */
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-static struct clk clk_xtal = {
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+struct clk clk_xtal = {
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.name = "xtal",
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.id = -1,
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.rate = 0,
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@@ -221,6 +221,11 @@ static struct clk clk_xtal = {
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.ctrlbit = 0,
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};
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+struct clk clk_mpll = {
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+ .name = "mpll",
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+ .id = -1,
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+};
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+
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struct clk clk_upll = {
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.name = "upll",
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.id = -1,
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@@ -232,7 +237,7 @@ struct clk clk_f = {
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.name = "fclk",
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.id = -1,
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.rate = 0,
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- .parent = NULL,
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+ .parent = &clk_mpll,
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.ctrlbit = 0,
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};
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@@ -413,6 +418,7 @@ int __init s3c24xx_setup_clocks(unsigned long xtal,
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clk_xtal.rate = xtal;
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clk_upll.rate = s3c2410_get_pll(__raw_readl(S3C2410_UPLLCON), xtal);
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+ clk_mpll.rate = fclk;
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clk_h.rate = hclk;
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clk_p.rate = pclk;
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clk_f.rate = fclk;
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@@ -424,6 +430,9 @@ int __init s3c24xx_setup_clocks(unsigned long xtal,
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if (s3c24xx_register_clock(&clk_xtal) < 0)
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printk(KERN_ERR "failed to register master xtal\n");
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+ if (s3c24xx_register_clock(&clk_mpll) < 0)
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+ printk(KERN_ERR "failed to register mpll clock\n");
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+
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if (s3c24xx_register_clock(&clk_upll) < 0)
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printk(KERN_ERR "failed to register upll clock\n");
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