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@@ -24,6 +24,7 @@
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#include <linux/clkdev.h>
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#include <mach/clock.h>
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#include <mach/common.h>
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+#include <mach/r8a7790.h>
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/*
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* MD EXTAL PLL0 PLL1 PLL3
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@@ -42,8 +43,6 @@
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* see "p1 / 2" on R8A7790_CLOCK_ROOT() below
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*/
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-#define MD(nr) (1 << nr)
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-
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#define CPG_BASE 0xe6150000
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#define CPG_LEN 0x1000
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@@ -53,7 +52,6 @@
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#define SMSTPCR5 0xe6150144
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#define SMSTPCR7 0xe615014c
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-#define MODEMR 0xE6160060
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#define SDCKCR 0xE6150074
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#define SD2CKCR 0xE6150078
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#define SD3CKCR 0xE615007C
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@@ -288,14 +286,9 @@ static struct clk_lookup lookups[] = {
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void __init r8a7790_clock_init(void)
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{
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- void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE);
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- u32 mode;
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+ u32 mode = r8a7790_read_mode_pins();
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int k, ret = 0;
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- BUG_ON(!modemr);
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- mode = ioread32(modemr);
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- iounmap(modemr);
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-
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switch (mode & (MD(14) | MD(13))) {
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case 0:
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R8A7790_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88);
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