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@@ -101,6 +101,13 @@ enum {
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MAX8998_IRQ_NR,
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};
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+/* MAX8998 various variants */
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+enum {
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+ TYPE_MAX8998 = 0, /* Default */
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+ TYPE_LP3974, /* National version of MAX8998 */
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+ TYPE_LP3979, /* Added AVS */
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+};
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+
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#define MAX8998_IRQ_DCINF_MASK (1 << 2)
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#define MAX8998_IRQ_DCINR_MASK (1 << 3)
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#define MAX8998_IRQ_JIGF_MASK (1 << 4)
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@@ -123,6 +130,8 @@ enum {
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#define MAX8998_IRQ_LOBAT1_MASK (1 << 0)
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#define MAX8998_IRQ_LOBAT2_MASK (1 << 1)
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+#define MAX8998_ENRAMP (1 << 4)
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+
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/**
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* struct max8998_dev - max8998 master device for sub-drivers
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* @dev: master device of the chip (can be used to access platform data)
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@@ -135,6 +144,7 @@ enum {
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* @ono: power onoff IRQ number for max8998
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* @irq_masks_cur: currently active value
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* @irq_masks_cache: cached hardware value
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+ * @type: indicate which max8998 "variant" is used
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*/
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struct max8998_dev {
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struct device *dev;
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@@ -148,6 +158,7 @@ struct max8998_dev {
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int ono;
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u8 irq_masks_cur[MAX8998_NUM_IRQ_REGS];
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u8 irq_masks_cache[MAX8998_NUM_IRQ_REGS];
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+ int type;
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};
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int max8998_irq_init(struct max8998_dev *max8998);
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