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@@ -30,6 +30,27 @@
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* snippets.
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*/
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+/*
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+ * In CPU_THUMBONLY case kernel arm opcodes are not allowed.
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+ * Note in this case codes skips those instructions but it uses .org
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+ * directive to keep correct layout of sigreturn_codes array.
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+ */
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+#ifndef CONFIG_CPU_THUMBONLY
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+#define ARM_OK(code...) code
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+#else
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+#define ARM_OK(code...)
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+#endif
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+
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+ .macro arm_slot n
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+ .org sigreturn_codes + 12 * (\n)
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+ARM_OK( .arm )
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+ .endm
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+
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+ .macro thumb_slot n
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+ .org sigreturn_codes + 12 * (\n) + 8
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+ .thumb
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+ .endm
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+
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#if __LINUX_ARM_ARCH__ <= 4
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/*
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* Note we manually set minimally required arch that supports
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@@ -45,26 +66,27 @@
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.global sigreturn_codes
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.type sigreturn_codes, #object
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- .arm
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+ .align
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sigreturn_codes:
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/* ARM sigreturn syscall code snippet */
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- mov r7, #(__NR_sigreturn - __NR_SYSCALL_BASE)
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- swi #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)
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+ arm_slot 0
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+ARM_OK( mov r7, #(__NR_sigreturn - __NR_SYSCALL_BASE) )
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+ARM_OK( swi #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE) )
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/* Thumb sigreturn syscall code snippet */
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- .thumb
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+ thumb_slot 0
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movs r7, #(__NR_sigreturn - __NR_SYSCALL_BASE)
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swi #0
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/* ARM sigreturn_rt syscall code snippet */
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- .arm
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- mov r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE)
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- swi #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)
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+ arm_slot 1
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+ARM_OK( mov r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE) )
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+ARM_OK( swi #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE) )
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/* Thumb sigreturn_rt syscall code snippet */
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- .thumb
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+ thumb_slot 1
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movs r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE)
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swi #0
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@@ -74,7 +96,7 @@ sigreturn_codes:
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* it is thumb case or not, so we need additional
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* word after real last entry.
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*/
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- .arm
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+ arm_slot 2
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.space 4
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.size sigreturn_codes, . - sigreturn_codes
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