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+/*
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+ * AmigaOne Device Tree Source
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+ *
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+ * Copyright 2008 Gerhard Pircher (gerhard_pircher@gmx.net)
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License as published by the
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+ * Free Software Foundation; either version 2 of the License, or (at your
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+ * option) any later version.
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+ */
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+
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+/dts-v1/;
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+
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+/ {
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+ model = "AmigaOne";
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+ compatible = "eyetech,amigaone";
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+ coherency-off;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ cpus {
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+ #cpus = <1>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ cpu@0 {
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+ device_type = "cpu";
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+ reg = <0>;
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+ d-cache-line-size = <32>; // 32 bytes
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+ i-cache-line-size = <32>; // 32 bytes
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+ d-cache-size = <32768>; // L1, 32K
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+ i-cache-size = <32768>; // L1, 32K
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+ timebase-frequency = <0>; // 33.3 MHz, from U-boot
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+ clock-frequency = <0>; // From U-boot
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+ bus-frequency = <0>; // From U-boot
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+ };
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+ };
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+
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+ memory {
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+ device_type = "memory";
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+ reg = <0 0>; // From U-boot
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+ };
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+
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+ pci@80000000 {
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+ device_type = "pci";
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+ compatible = "mai-logic,articia-s";
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+ bus-frequency = <33333333>;
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+ bus-range = <0 0xff>;
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+ ranges = <0x01000000 0 0x00000000 0xfe000000 0 0x00c00000 // PCI I/O
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+ 0x02000000 0 0x80000000 0x80000000 0 0x7d000000 // PCI memory
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+ 0x02000000 0 0x00000000 0xfd000000 0 0x01000000>; // PCI alias memory (ISA)
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+ // Configuration address and data register.
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+ reg = <0xfec00cf8 4
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+ 0xfee00cfc 4>;
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+ 8259-interrupt-acknowledge = <0xfef00000>;
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+ // Do not define a interrupt-parent here, if there is no
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+ // interrupt-map property.
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+
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+ isa@7 {
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+ device_type = "isa";
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+ compatible = "pciclass,0601";
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+ vendor-id = <0x00001106>;
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+ device-id = <0x00000686>;
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+ revision-id = <0x00000010>;
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+ class-code = <0x00060100>;
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+ subsystem-id = <0>;
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+ subsystem-vendor-id = <0>;
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+ devsel-speed = <0x00000001>;
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+ min-grant = <0>;
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+ max-latency = <0>;
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+ /* First 64k for I/O at 0x0 on PCI mapped to 0x0 on ISA. */
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+ ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00010000>;
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+ interrupt-parent = <&i8259>;
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+ #interrupt-cells = <2>;
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+ #address-cells = <2>;
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+ #size-cells = <1>;
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+
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+ dma-controller@0 {
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+ compatible = "pnpPNP,200";
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+ reg = <1 0x00000000 0x00000020
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+ 1 0x00000080 0x00000010
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+ 1 0x000000c0 0x00000020>;
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+ };
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+
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+ i8259: interrupt-controller@20 {
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+ device_type = "interrupt-controller";
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+ compatible = "pnpPNP,000";
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+ interrupt-controller;
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+ reg = <1 0x00000020 0x00000002
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+ 1 0x000000a0 0x00000002
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+ 1 0x000004d0 0x00000002>;
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+ reserved-interrupts = <2>;
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+ #interrupt-cells = <2>;
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+ };
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+
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+ timer@40 {
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+ // Also adds pcspkr to platform devices.
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+ compatible = "pnpPNP,100";
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+ reg = <1 0x00000040 0x00000020>;
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+ };
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+
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+ 8042@60 {
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+ device_type = "8042";
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+ reg = <1 0x00000060 0x00000001
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+ 1 0x00000064 0x00000001>;
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+ interrupts = <1 3 12 3>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ keyboard@0 {
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+ compatible = "pnpPNP,303";
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+ reg = <0>;
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+ };
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+
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+ mouse@1 {
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+ compatible = "pnpPNP,f03";
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+ reg = <1>;
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+ };
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+ };
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+
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+ rtc@70 {
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+ compatible = "pnpPNP,b00";
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+ reg = <1 0x00000070 0x00000002>;
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+ interrupts = <8 3>;
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+ };
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+
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+ serial@3f8 {
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+ device_type = "serial";
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+ compatible = "pnpPNP,501","pnpPNP,500";
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+ reg = <1 0x000003f8 0x00000008>;
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+ interrupts = <4 3>;
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+ clock-frequency = <1843200>;
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+ current-speed = <115200>;
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+ };
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+
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+ serial@2f8 {
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+ device_type = "serial";
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+ compatible = "pnpPNP,501","pnpPNP,500";
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+ reg = <1 0x000002f8 0x00000008>;
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+ interrupts = <3 3>;
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+ clock-frequency = <1843200>;
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+ current-speed = <115200>;
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+ };
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+
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+ parallel@378 {
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+ device_type = "parallel";
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+ // No ECP support for now, otherwise add "pnpPNP,401".
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+ compatible = "pnpPNP,400";
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+ reg = <1 0x00000378 0x00000003
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+ 1 0x00000778 0x00000003>;
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+ };
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+
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+ fdc@3f0 {
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+ device_type = "fdc";
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+ compatible = "pnpPNP,700";
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+ reg = <1 0x000003f0 0x00000008>;
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+ interrupts = <6 3>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ disk@0 {
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+ reg = <0>;
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+ };
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+ };
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+ };
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+ };
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+
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+ chosen {
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+ linux,stdout-path = "/pci@80000000/isa@7/serial@3f8";
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+ };
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+};
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