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@@ -159,15 +159,9 @@
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#define D64_RX_FRM_STS_DSCRCNT 0x0f000000 /* no. of descriptors used - 1 */
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#define D64_RX_FRM_STS_DATATYPE 0xf0000000 /* core-dependent data type */
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-#define DMADDRWIDTH_30 30 /* 30-bit addressing capability */
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-#define DMADDRWIDTH_32 32 /* 32-bit addressing capability */
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-#define DMADDRWIDTH_63 63 /* 64-bit addressing capability */
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-#define DMADDRWIDTH_64 64 /* 64-bit addressing capability */
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-
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#define DMA64_DD_PARITY(dd) \
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parity32((dd)->addrlow ^ (dd)->addrhigh ^ (dd)->ctrl1 ^ (dd)->ctrl2)
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-
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/*
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* packet headroom necessary to accommodate the largest header
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* in the system, (i.e TXOFF). By doing, we avoid the need to
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@@ -1936,23 +1930,6 @@ static void dma64_txrotate(struct dma_info *di)
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di->xmtptrbase + I2B(di->txout, struct dma64desc));
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}
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-uint dma_addrwidth(struct si_pub *sih, void *dmaregs)
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-{
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- /* Perform 64-bit checks only if we want to advertise 64-bit (> 32bit) capability) */
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- /* DMA engine is 64-bit capable */
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- if ((ai_core_sflags(sih, 0, 0) & SISF_DMA64) == SISF_DMA64) {
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- /* backplane are 64-bit capable */
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- if (ai_backplane64(sih))
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- /* If bus is System Backplane or PCIE then we can access 64-bits */
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- if ((sih->bustype == SI_BUS) ||
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- ((sih->bustype == PCI_BUS) &&
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- (sih->buscoretype == PCIE_CORE_ID)))
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- return DMADDRWIDTH_64;
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- }
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- /* DMA hardware not supported by this driver */
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- return DMADDRWIDTH_64;
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-}
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-
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/*
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* Mac80211 initiated actions sometimes require packets in the DMA queue to be
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* modified. The modified portion of the packet is not under control of the DMA
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