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@@ -1482,15 +1482,15 @@
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GEN6_CXT_RENDER_SIZE(cxt_reg) + \
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GEN6_CXT_EXTENDED_SIZE(cxt_reg) + \
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GEN6_CXT_PIPELINE_SIZE(cxt_reg))
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-#define GEN7_CTX_SIZE 0x21a8
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-#define GEN7_CTX_RENDER_SIZE(ctx_reg) ((ctx_reg >> 16) & 0x3f)
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-#define GEN7_CTX_EXTENDED_SIZE(ctx_reg) ((ctx_reg >> 9) & 0x7f)
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-#define GEN7_CTX_GT1_SIZE(ctx_reg) ((ctx_reg >> 6) & 0x7)
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-#define GEN7_CTX_VFSTATE_SIZE(ctx_reg) ((ctx_reg >> 0) & 0x3f)
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-#define GEN7_CTX_TOTAL_SIZE(ctx_reg) (GEN7_CTX_RENDER_SIZE(ctx_reg) + \
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- GEN7_CTX_EXTENDED_SIZE(ctx_reg) + \
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- GEN7_CTX_GT1_SIZE(ctx_reg) + \
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- GEN7_CTX_VFSTATE_SIZE(ctx_reg))
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+#define GEN7_CXT_SIZE 0x21a8
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+#define GEN7_CXT_RENDER_SIZE(ctx_reg) ((ctx_reg >> 16) & 0x3f)
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+#define GEN7_CXT_EXTENDED_SIZE(ctx_reg) ((ctx_reg >> 9) & 0x7f)
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+#define GEN7_CXT_GT1_SIZE(ctx_reg) ((ctx_reg >> 6) & 0x7)
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+#define GEN7_CXT_VFSTATE_SIZE(ctx_reg) ((ctx_reg >> 0) & 0x3f)
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+#define GEN7_CXT_TOTAL_SIZE(ctx_reg) (GEN7_CXT_RENDER_SIZE(ctx_reg) + \
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+ GEN7_CXT_EXTENDED_SIZE(ctx_reg) + \
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+ GEN7_CXT_GT1_SIZE(ctx_reg) + \
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+ GEN7_CXT_VFSTATE_SIZE(ctx_reg))
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/*
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* Overlay regs
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