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@@ -398,6 +398,7 @@ struct ohci_hcd {
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#define OHCI_QUIRK_BE_MMIO 0x10 /* BE registers */
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#define OHCI_QUIRK_ZFMICRO 0x20 /* Compaq ZFMicro chipset*/
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#define OHCI_QUIRK_NEC 0x40 /* lost interrupts */
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+#define OHCI_QUIRK_FRAME_NO 0x80 /* no big endian frame_no shift */
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// there are also chip quirks/bugs in init logic
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struct work_struct nec_work; /* Worker for NEC quirk */
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@@ -633,15 +634,12 @@ static inline u32 hc32_to_cpup (const struct ohci_hcd *ohci, const __hc32 *x)
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/* HCCA frame number is 16 bits, but is accessed as 32 bits since not all
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* hardware handles 16 bit reads. That creates a different confusion on
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* some big-endian SOC implementations. Same thing happens with PSW access.
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- *
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- * FIXME: Deal with that as a runtime quirk when STB03xxx is ported over
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- * to arch/powerpc
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*/
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-#ifdef CONFIG_STB03xxx
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-#define OHCI_BE_FRAME_NO_SHIFT 16
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+#ifdef CONFIG_PPC_MPC52xx
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+#define big_endian_frame_no_quirk(ohci) (ohci->flags & OHCI_QUIRK_FRAME_NO)
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#else
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-#define OHCI_BE_FRAME_NO_SHIFT 0
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+#define big_endian_frame_no_quirk(ohci) 0
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#endif
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static inline u16 ohci_frame_no(const struct ohci_hcd *ohci)
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@@ -649,7 +647,8 @@ static inline u16 ohci_frame_no(const struct ohci_hcd *ohci)
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u32 tmp;
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if (big_endian_desc(ohci)) {
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tmp = be32_to_cpup((__force __be32 *)&ohci->hcca->frame_no);
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- tmp >>= OHCI_BE_FRAME_NO_SHIFT;
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+ if (!big_endian_frame_no_quirk(ohci))
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+ tmp >>= 16;
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} else
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tmp = le32_to_cpup((__force __le32 *)&ohci->hcca->frame_no);
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