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@@ -119,14 +119,12 @@ static int tda18271_channel_configuration(struct dvb_frontend *fe,
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tda18271_write_regs(fe, R_TM, 7);
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/* main pll charge pump source */
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- regs[R_EB4] |= 0x20;
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- tda18271_write_regs(fe, R_EB4, 1);
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+ tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 1);
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msleep(1);
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/* normal operation for the main pll */
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- regs[R_EB4] &= ~0x20;
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- tda18271_write_regs(fe, R_EB4, 1);
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+ tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 0);
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msleep(20);
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@@ -285,12 +283,10 @@ static int tda18271_calibrate_rf(struct dvb_frontend *fe, u32 freq)
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tda18271_write_regs(fe, R_EB13, 1);
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/* main pll charge pump source */
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- regs[R_EB4] |= 0x20;
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- tda18271_write_regs(fe, R_EB4, 1);
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+ tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 1);
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/* cal pll charge pump source */
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- regs[R_EB7] |= 0x20;
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- tda18271_write_regs(fe, R_EB7, 1);
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+ tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 1);
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/* force dcdc converter to 0 V */
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regs[R_EB14] = 0x00;
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@@ -328,12 +324,10 @@ static int tda18271_calibrate_rf(struct dvb_frontend *fe, u32 freq)
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/* --------------------------------------------------------------- */
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/* normal operation for the main pll */
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- regs[R_EB4] &= ~0x20;
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- tda18271_write_regs(fe, R_EB4, 1);
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+ tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 0);
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/* normal operation for the cal pll */
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- regs[R_EB7] &= ~0x20;
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- tda18271_write_regs(fe, R_EB7, 1);
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+ tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 0);
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msleep(10); /* plls locking */
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