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@@ -354,7 +354,7 @@ static int radeon_cs_ib_chunk(struct radeon_device *rdev,
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}
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radeon_cs_sync_rings(parser);
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parser->ib.vm_id = 0;
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- r = radeon_ib_schedule(rdev, &parser->ib);
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+ r = radeon_ib_schedule(rdev, &parser->ib, NULL);
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if (r) {
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DRM_ERROR("Failed to schedule IB !\n");
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}
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@@ -452,25 +452,24 @@ static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev,
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}
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radeon_cs_sync_rings(parser);
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+ parser->ib.vm_id = vm->id;
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+ /* ib pool is bind at 0 in virtual address space,
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+ * so gpu_addr is the offset inside the pool bo
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+ */
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+ parser->ib.gpu_addr = parser->ib.sa_bo->soffset;
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+
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if ((rdev->family >= CHIP_TAHITI) &&
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(parser->chunk_const_ib_idx != -1)) {
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parser->const_ib.vm_id = vm->id;
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- /* ib pool is bind at 0 in virtual address space to gpu_addr is the
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- * offset inside the pool bo
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+ /* ib pool is bind at 0 in virtual address space,
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+ * so gpu_addr is the offset inside the pool bo
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*/
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parser->const_ib.gpu_addr = parser->const_ib.sa_bo->soffset;
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- r = radeon_ib_schedule(rdev, &parser->const_ib);
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- if (r)
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- goto out;
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+ r = radeon_ib_schedule(rdev, &parser->ib, &parser->const_ib);
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+ } else {
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+ r = radeon_ib_schedule(rdev, &parser->ib, NULL);
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}
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- parser->ib.vm_id = vm->id;
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- /* ib pool is bind at 0 in virtual address space to gpu_addr is the
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- * offset inside the pool bo
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- */
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- parser->ib.gpu_addr = parser->ib.sa_bo->soffset;
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- parser->ib.is_const_ib = false;
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- r = radeon_ib_schedule(rdev, &parser->ib);
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out:
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if (!r) {
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if (vm->fence) {
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