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@@ -105,7 +105,8 @@ static const int txqaddr[] = { Q_XA1, Q_XA2 };
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static const int rxqaddr[] = { Q_R1, Q_R2 };
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static const int rxqaddr[] = { Q_R1, Q_R2 };
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static const u32 rxirqmask[] = { IS_R1_F, IS_R2_F };
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static const u32 rxirqmask[] = { IS_R1_F, IS_R2_F };
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static const u32 txirqmask[] = { IS_XA1_F, IS_XA2_F };
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static const u32 txirqmask[] = { IS_XA1_F, IS_XA2_F };
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-static const u32 irqmask[] = { IS_R1_F|IS_XA1_F, IS_R2_F|IS_XA2_F };
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+static const u32 napimask[] = { IS_R1_F|IS_XA1_F, IS_R2_F|IS_XA2_F };
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+static const u32 portmask[] = { IS_PORT_1, IS_PORT_2 };
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static int skge_get_regs_len(struct net_device *dev)
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static int skge_get_regs_len(struct net_device *dev)
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{
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{
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@@ -2504,6 +2505,11 @@ static int skge_up(struct net_device *dev)
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skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_START | CSR_IRQ_CL_F);
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skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_START | CSR_IRQ_CL_F);
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skge_led(skge, LED_MODE_ON);
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skge_led(skge, LED_MODE_ON);
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+ spin_lock_irq(&hw->hw_lock);
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+ hw->intr_mask |= portmask[port];
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+ skge_write32(hw, B0_IMSK, hw->intr_mask);
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+ spin_unlock_irq(&hw->hw_lock);
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+
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netif_poll_enable(dev);
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netif_poll_enable(dev);
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return 0;
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return 0;
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@@ -2533,6 +2539,13 @@ static int skge_down(struct net_device *dev)
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if (hw->chip_id == CHIP_ID_GENESIS && hw->phy_type == SK_PHY_XMAC)
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if (hw->chip_id == CHIP_ID_GENESIS && hw->phy_type == SK_PHY_XMAC)
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cancel_delayed_work(&skge->link_thread);
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cancel_delayed_work(&skge->link_thread);
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+ netif_poll_disable(dev);
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+
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+ spin_lock_irq(&hw->hw_lock);
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+ hw->intr_mask &= ~portmask[port];
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+ skge_write32(hw, B0_IMSK, hw->intr_mask);
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+ spin_unlock_irq(&hw->hw_lock);
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+
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skge_write8(skge->hw, SK_REG(skge->port, LNK_LED_REG), LED_OFF);
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skge_write8(skge->hw, SK_REG(skge->port, LNK_LED_REG), LED_OFF);
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if (hw->chip_id == CHIP_ID_GENESIS)
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if (hw->chip_id == CHIP_ID_GENESIS)
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genesis_stop(skge);
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genesis_stop(skge);
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@@ -2575,8 +2588,6 @@ static int skge_down(struct net_device *dev)
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skge_led(skge, LED_MODE_OFF);
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skge_led(skge, LED_MODE_OFF);
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- netif_poll_disable(dev);
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-
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netif_tx_lock_bh(dev);
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netif_tx_lock_bh(dev);
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skge_tx_clean(dev);
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skge_tx_clean(dev);
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netif_tx_unlock_bh(dev);
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netif_tx_unlock_bh(dev);
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@@ -3051,7 +3062,7 @@ static int skge_poll(struct net_device *dev, int *budget)
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spin_lock_irqsave(&hw->hw_lock, flags);
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spin_lock_irqsave(&hw->hw_lock, flags);
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__netif_rx_complete(dev);
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__netif_rx_complete(dev);
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- hw->intr_mask |= irqmask[skge->port];
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+ hw->intr_mask |= napimask[skge->port];
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skge_write32(hw, B0_IMSK, hw->intr_mask);
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skge_write32(hw, B0_IMSK, hw->intr_mask);
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skge_read32(hw, B0_IMSK);
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skge_read32(hw, B0_IMSK);
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spin_unlock_irqrestore(&hw->hw_lock, flags);
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spin_unlock_irqrestore(&hw->hw_lock, flags);
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@@ -3415,10 +3426,9 @@ static int skge_reset(struct skge_hw *hw)
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else
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else
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hw->ram_size = t8 * 4096;
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hw->ram_size = t8 * 4096;
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- hw->intr_mask = IS_HW_ERR | IS_PORT_1;
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- if (hw->ports > 1)
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- hw->intr_mask |= IS_PORT_2;
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+ hw->intr_mask = IS_HW_ERR;
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+ /* Use PHY IRQ for all but fiber based Genesis board */
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if (!(hw->chip_id == CHIP_ID_GENESIS && hw->phy_type == SK_PHY_XMAC))
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if (!(hw->chip_id == CHIP_ID_GENESIS && hw->phy_type == SK_PHY_XMAC))
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hw->intr_mask |= IS_EXT_REG;
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hw->intr_mask |= IS_EXT_REG;
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