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@@ -10,6 +10,8 @@
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* the Free Software Foundation.
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*/
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+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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+
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#include <linux/types.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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@@ -225,8 +227,8 @@ static int i8042_flush(void)
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udelay(50);
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data = i8042_read_data();
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i++;
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- dbg("%02x <- i8042 (flush, %s)", data,
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- str & I8042_STR_AUXDATA ? "aux" : "kbd");
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+ dbg("%02x <- i8042 (flush, %s)\n",
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+ data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
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}
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spin_unlock_irqrestore(&i8042_lock, flags);
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@@ -253,32 +255,32 @@ static int __i8042_command(unsigned char *param, int command)
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if (error)
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return error;
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- dbg("%02x -> i8042 (command)", command & 0xff);
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+ dbg("%02x -> i8042 (command)\n", command & 0xff);
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i8042_write_command(command & 0xff);
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for (i = 0; i < ((command >> 12) & 0xf); i++) {
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error = i8042_wait_write();
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if (error)
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return error;
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- dbg("%02x -> i8042 (parameter)", param[i]);
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+ dbg("%02x -> i8042 (parameter)\n", param[i]);
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i8042_write_data(param[i]);
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}
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for (i = 0; i < ((command >> 8) & 0xf); i++) {
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error = i8042_wait_read();
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if (error) {
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- dbg(" -- i8042 (timeout)");
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+ dbg(" -- i8042 (timeout)\n");
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return error;
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}
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if (command == I8042_CMD_AUX_LOOP &&
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!(i8042_read_status() & I8042_STR_AUXDATA)) {
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- dbg(" -- i8042 (auxerr)");
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+ dbg(" -- i8042 (auxerr)\n");
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return -1;
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}
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param[i] = i8042_read_data();
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- dbg("%02x <- i8042 (return)", param[i]);
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+ dbg("%02x <- i8042 (return)\n", param[i]);
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}
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return 0;
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@@ -309,7 +311,7 @@ static int i8042_kbd_write(struct serio *port, unsigned char c)
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spin_lock_irqsave(&i8042_lock, flags);
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if (!(retval = i8042_wait_write())) {
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- dbg("%02x -> i8042 (kbd-data)", c);
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+ dbg("%02x -> i8042 (kbd-data)\n", c);
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i8042_write_data(c);
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}
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@@ -355,17 +357,14 @@ static void i8042_port_close(struct serio *serio)
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i8042_ctr &= ~irq_bit;
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if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
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- printk(KERN_WARNING
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- "i8042.c: Can't write CTR while closing %s port.\n",
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- port_name);
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+ pr_warn("Can't write CTR while closing %s port\n", port_name);
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udelay(50);
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i8042_ctr &= ~disable_bit;
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i8042_ctr |= irq_bit;
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if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
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- printk(KERN_ERR "i8042.c: Can't reactivate %s port.\n",
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- port_name);
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+ pr_err("Can't reactivate %s port\n", port_name);
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/*
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* See if there is any data appeared while we were messing with
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@@ -456,7 +455,8 @@ static irqreturn_t i8042_interrupt(int irq, void *dev_id)
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str = i8042_read_status();
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if (unlikely(~str & I8042_STR_OBF)) {
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spin_unlock_irqrestore(&i8042_lock, flags);
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- if (irq) dbg("Interrupt %d, without any data", irq);
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+ if (irq)
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+ dbg("Interrupt %d, without any data\n", irq);
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ret = 0;
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goto out;
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}
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@@ -469,7 +469,8 @@ static irqreturn_t i8042_interrupt(int irq, void *dev_id)
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dfl = 0;
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if (str & I8042_STR_MUXERR) {
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- dbg("MUX error, status is %02x, data is %02x", str, data);
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+ dbg("MUX error, status is %02x, data is %02x\n",
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+ str, data);
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/*
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* When MUXERR condition is signalled the data register can only contain
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* 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
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@@ -512,7 +513,7 @@ static irqreturn_t i8042_interrupt(int irq, void *dev_id)
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port = &i8042_ports[port_no];
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serio = port->exists ? port->serio : NULL;
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- dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
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+ dbg("%02x <- i8042 (interrupt, %d, %d%s%s)\n",
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data, port_no, irq,
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dfl & SERIO_PARITY ? ", bad parity" : "",
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dfl & SERIO_TIMEOUT ? ", timeout" : "");
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@@ -540,7 +541,7 @@ static int i8042_enable_kbd_port(void)
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if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
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i8042_ctr &= ~I8042_CTR_KBDINT;
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i8042_ctr |= I8042_CTR_KBDDIS;
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- printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n");
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+ pr_err("Failed to enable KBD port\n");
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return -EIO;
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}
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@@ -559,7 +560,7 @@ static int i8042_enable_aux_port(void)
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if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
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i8042_ctr &= ~I8042_CTR_AUXINT;
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i8042_ctr |= I8042_CTR_AUXDIS;
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- printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n");
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+ pr_err("Failed to enable AUX port\n");
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return -EIO;
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}
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@@ -641,7 +642,7 @@ static int __init i8042_check_mux(void)
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if (i8042_set_mux_mode(true, &mux_version))
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return -1;
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- printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
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+ pr_info("Detected active multiplexing controller, rev %d.%d\n",
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(mux_version >> 4) & 0xf, mux_version & 0xf);
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/*
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@@ -651,7 +652,7 @@ static int __init i8042_check_mux(void)
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i8042_ctr &= ~I8042_CTR_AUXINT;
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if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
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- printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
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+ pr_err("Failed to disable AUX port, can't use MUX\n");
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return -EIO;
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}
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@@ -676,8 +677,8 @@ static irqreturn_t __init i8042_aux_test_irq(int irq, void *dev_id)
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str = i8042_read_status();
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if (str & I8042_STR_OBF) {
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data = i8042_read_data();
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- dbg("%02x <- i8042 (aux_test_irq, %s)",
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- data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
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+ dbg("%02x <- i8042 (aux_test_irq, %s)\n",
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+ data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
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if (i8042_irq_being_tested &&
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data == 0xa5 && (str & I8042_STR_AUXDATA))
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complete(&i8042_aux_irq_delivered);
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@@ -770,8 +771,8 @@ static int __init i8042_check_aux(void)
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*/
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if (i8042_toggle_aux(false)) {
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- printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
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- printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
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+ pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
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+ pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n");
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}
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if (i8042_toggle_aux(true))
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@@ -819,7 +820,7 @@ static int __init i8042_check_aux(void)
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* AUX IRQ was never delivered so we need to flush the controller to
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* get rid of the byte we put there; otherwise keyboard may not work.
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*/
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- dbg(" -- i8042 (aux irq test timeout)");
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+ dbg(" -- i8042 (aux irq test timeout)\n");
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i8042_flush();
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retval = -1;
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}
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@@ -845,7 +846,7 @@ static int __init i8042_check_aux(void)
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static int i8042_controller_check(void)
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{
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if (i8042_flush() == I8042_BUFFER_SIZE) {
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- printk(KERN_ERR "i8042.c: No controller found.\n");
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+ pr_err("No controller found\n");
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return -ENODEV;
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}
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@@ -864,15 +865,15 @@ static int i8042_controller_selftest(void)
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do {
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if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
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- printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
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+ pr_err("i8042 controller self test timeout\n");
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return -ENODEV;
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}
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if (param == I8042_RET_CTL_TEST)
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return 0;
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- printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
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- param, I8042_RET_CTL_TEST);
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+ pr_err("i8042 controller selftest failed. (%#x != %#x)\n",
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+ param, I8042_RET_CTL_TEST);
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msleep(50);
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} while (i++ < 5);
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@@ -883,8 +884,7 @@ static int i8042_controller_selftest(void)
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* and user will still get a working keyboard. This is especially
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* important on netbooks. On other arches we trust hardware more.
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*/
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- printk(KERN_INFO
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- "i8042: giving up on controller selftest, continuing anyway...\n");
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+ pr_info("giving up on controller selftest, continuing anyway...\n");
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return 0;
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#else
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return -EIO;
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@@ -909,8 +909,7 @@ static int i8042_controller_init(void)
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do {
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if (n >= 10) {
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- printk(KERN_ERR
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- "i8042.c: Unable to get stable CTR read.\n");
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+ pr_err("Unable to get stable CTR read\n");
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return -EIO;
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}
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@@ -918,8 +917,7 @@ static int i8042_controller_init(void)
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udelay(50);
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if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) {
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- printk(KERN_ERR
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- "i8042.c: Can't read CTR while initializing i8042.\n");
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+ pr_err("Can't read CTR while initializing i8042\n");
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return -EIO;
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}
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@@ -943,7 +941,7 @@ static int i8042_controller_init(void)
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if (i8042_unlock)
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i8042_ctr |= I8042_CTR_IGNKEYLOCK;
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else
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- printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
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+ pr_warn("Warning: Keylock active\n");
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}
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spin_unlock_irqrestore(&i8042_lock, flags);
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@@ -970,7 +968,7 @@ static int i8042_controller_init(void)
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*/
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if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
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- printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
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+ pr_err("Can't write CTR while initializing i8042\n");
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return -EIO;
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}
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@@ -1000,7 +998,7 @@ static void i8042_controller_reset(void)
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i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
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if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
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- printk(KERN_WARNING "i8042.c: Can't write CTR while resetting.\n");
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+ pr_warn("Can't write CTR while resetting\n");
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/*
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* Disable MUX mode if present.
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@@ -1021,7 +1019,7 @@ static void i8042_controller_reset(void)
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*/
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if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
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- printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
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+ pr_warn("Can't restore CTR\n");
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}
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@@ -1045,14 +1043,14 @@ static long i8042_panic_blink(int state)
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led = (state) ? 0x01 | 0x04 : 0;
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while (i8042_read_status() & I8042_STR_IBF)
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DELAY;
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- dbg("%02x -> i8042 (panic blink)", 0xed);
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+ dbg("%02x -> i8042 (panic blink)\n", 0xed);
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i8042_suppress_kbd_ack = 2;
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i8042_write_data(0xed); /* set leds */
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DELAY;
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while (i8042_read_status() & I8042_STR_IBF)
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DELAY;
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DELAY;
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- dbg("%02x -> i8042 (panic blink)", led);
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+ dbg("%02x -> i8042 (panic blink)\n", led);
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i8042_write_data(led);
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DELAY;
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return delay;
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@@ -1068,9 +1066,7 @@ static void i8042_dritek_enable(void)
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error = i8042_command(¶m, 0x1059);
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if (error)
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- printk(KERN_WARNING
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- "Failed to enable DRITEK extension: %d\n",
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- error);
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+ pr_warn("Failed to enable DRITEK extension: %d\n", error);
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}
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#endif
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@@ -1105,10 +1101,10 @@ static int i8042_controller_resume(bool force_reset)
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i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
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i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
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if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
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- printk(KERN_WARNING "i8042: Can't write CTR to resume, retrying...\n");
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+ pr_warn("Can't write CTR to resume, retrying...\n");
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msleep(50);
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if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
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- printk(KERN_ERR "i8042: CTR write retry failed\n");
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+ pr_err("CTR write retry failed\n");
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return -EIO;
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}
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}
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@@ -1121,9 +1117,7 @@ static int i8042_controller_resume(bool force_reset)
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if (i8042_mux_present) {
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if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports())
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- printk(KERN_WARNING
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- "i8042: failed to resume active multiplexor, "
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- "mouse won't work.\n");
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+ pr_warn("failed to resume active multiplexor, mouse won't work\n");
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} else if (i8042_ports[I8042_AUX_PORT_NO].serio)
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i8042_enable_aux_port();
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