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@@ -2707,6 +2707,19 @@ void dispc_dump_irqs(struct seq_file *s)
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void dispc_dump_regs(struct seq_file *s)
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{
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+ int i, j;
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+ const char *mgr_names[] = {
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+ [OMAP_DSS_CHANNEL_LCD] = "LCD",
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+ [OMAP_DSS_CHANNEL_DIGIT] = "TV",
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+ [OMAP_DSS_CHANNEL_LCD2] = "LCD2",
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+ };
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+ const char *ovl_names[] = {
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+ [OMAP_DSS_GFX] = "GFX",
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+ [OMAP_DSS_VIDEO1] = "VID1",
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+ [OMAP_DSS_VIDEO2] = "VID2",
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+ };
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+ const char **p_names;
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+
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#define DUMPREG(r) seq_printf(s, "%-50s %08x\n", #r, dispc_read_reg(r))
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if (dispc_runtime_get())
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@@ -2733,258 +2746,115 @@ void dispc_dump_regs(struct seq_file *s)
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#undef DUMPREG
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#define DISPC_REG(i, name) name(i)
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-#define DUMPREG(i, r) seq_printf(s, "%s(%s)%*s %08x\n", #r, #i, \
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- 48 - strlen(#r) - strlen(#i), " ", \
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+#define DUMPREG(i, r) seq_printf(s, "%s(%s)%*s %08x\n", #r, p_names[i], \
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+ 48 - strlen(#r) - strlen(p_names[i]), " ", \
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dispc_read_reg(DISPC_REG(i, r)))
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- /* LCD registers */
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- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DEFAULT_COLOR);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_TRANS_COLOR);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_TIMING_H);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_TIMING_V);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_POL_FREQ);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DIVISORo);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_SIZE_MGR);
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+ p_names = mgr_names;
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- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DATA_CYCLE1);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DATA_CYCLE2);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DATA_CYCLE3);
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+ /* DISPC channel specific registers */
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+ for (i = 0; i < dss_feat_get_num_mgrs(); i++) {
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+ DUMPREG(i, DISPC_DEFAULT_COLOR);
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+ DUMPREG(i, DISPC_TRANS_COLOR);
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+ DUMPREG(i, DISPC_SIZE_MGR);
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- if (dss_has_feature(FEAT_CPR)) {
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- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_CPR_COEF_R);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_CPR_COEF_G);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_CPR_COEF_B);
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- }
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+ if (i == OMAP_DSS_CHANNEL_DIGIT)
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+ continue;
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- /* DIGIT registers */
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- DUMPREG(OMAP_DSS_CHANNEL_DIGIT, DISPC_DEFAULT_COLOR);
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- DUMPREG(OMAP_DSS_CHANNEL_DIGIT, DISPC_TRANS_COLOR);
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- DUMPREG(OMAP_DSS_CHANNEL_DIGIT, DISPC_SIZE_MGR);
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+ DUMPREG(i, DISPC_DEFAULT_COLOR);
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+ DUMPREG(i, DISPC_TRANS_COLOR);
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+ DUMPREG(i, DISPC_TIMING_H);
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+ DUMPREG(i, DISPC_TIMING_V);
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+ DUMPREG(i, DISPC_POL_FREQ);
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+ DUMPREG(i, DISPC_DIVISORo);
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+ DUMPREG(i, DISPC_SIZE_MGR);
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- /* LCD2 registers */
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- if (dss_has_feature(FEAT_MGR_LCD2)) {
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- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DEFAULT_COLOR);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_TRANS_COLOR);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_TIMING_H);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_TIMING_V);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_POL_FREQ);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DIVISORo);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_SIZE_MGR);
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-
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- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DATA_CYCLE1);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DATA_CYCLE2);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DATA_CYCLE3);
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+ DUMPREG(i, DISPC_DATA_CYCLE1);
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+ DUMPREG(i, DISPC_DATA_CYCLE2);
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+ DUMPREG(i, DISPC_DATA_CYCLE3);
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if (dss_has_feature(FEAT_CPR)) {
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- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_CPR_COEF_R);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_CPR_COEF_G);
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- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_CPR_COEF_B);
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+ DUMPREG(i, DISPC_CPR_COEF_R);
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+ DUMPREG(i, DISPC_CPR_COEF_G);
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+ DUMPREG(i, DISPC_CPR_COEF_B);
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}
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}
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- /* GFX registers */
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- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_BA0);
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- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_BA1);
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- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_POSITION);
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- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_SIZE);
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- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_ATTRIBUTES);
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- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_FIFO_THRESHOLD);
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- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_FIFO_SIZE_STATUS);
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- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_ROW_INC);
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- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_PIXEL_INC);
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- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_WINDOW_SKIP);
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- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_TABLE_BA);
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- if (dss_has_feature(FEAT_PRELOAD))
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- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_PRELOAD);
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-
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- /* VIDEO1 registers */
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA0);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA1);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_POSITION);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_SIZE);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ATTRIBUTES);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIFO_THRESHOLD);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIFO_SIZE_STATUS);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ROW_INC);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_PIXEL_INC);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_PICTURE_SIZE);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU0);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU1);
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- if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA0_UV);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA1_UV);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR2);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU2_0);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU2_1);
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- }
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- if (dss_has_feature(FEAT_ATTR2))
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ATTRIBUTES2);
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- if (dss_has_feature(FEAT_PRELOAD))
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_PRELOAD);
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-
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- /* VIDEO2 registers */
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA0);
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA1);
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_POSITION);
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_SIZE);
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ATTRIBUTES);
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIFO_THRESHOLD);
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIFO_SIZE_STATUS);
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ROW_INC);
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_PIXEL_INC);
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR);
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_PICTURE_SIZE);
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU0);
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU1);
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- if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA0_UV);
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA1_UV);
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR2);
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU2_0);
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU2_1);
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+ p_names = ovl_names;
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+
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+ for (i = 0; i < dss_feat_get_num_ovls(); i++) {
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+ DUMPREG(i, DISPC_OVL_BA0);
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+ DUMPREG(i, DISPC_OVL_BA1);
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+ DUMPREG(i, DISPC_OVL_POSITION);
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+ DUMPREG(i, DISPC_OVL_SIZE);
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+ DUMPREG(i, DISPC_OVL_ATTRIBUTES);
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+ DUMPREG(i, DISPC_OVL_FIFO_THRESHOLD);
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+ DUMPREG(i, DISPC_OVL_FIFO_SIZE_STATUS);
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+ DUMPREG(i, DISPC_OVL_ROW_INC);
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+ DUMPREG(i, DISPC_OVL_PIXEL_INC);
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+ if (dss_has_feature(FEAT_PRELOAD))
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+ DUMPREG(i, DISPC_OVL_PRELOAD);
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+
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+ if (i == OMAP_DSS_GFX) {
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+ DUMPREG(i, DISPC_OVL_WINDOW_SKIP);
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+ DUMPREG(i, DISPC_OVL_TABLE_BA);
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+ continue;
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+ }
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+
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+ DUMPREG(i, DISPC_OVL_FIR);
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+ DUMPREG(i, DISPC_OVL_PICTURE_SIZE);
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+ DUMPREG(i, DISPC_OVL_ACCU0);
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+ DUMPREG(i, DISPC_OVL_ACCU1);
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+ if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
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+ DUMPREG(i, DISPC_OVL_BA0_UV);
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+ DUMPREG(i, DISPC_OVL_BA1_UV);
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+ DUMPREG(i, DISPC_OVL_FIR2);
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+ DUMPREG(i, DISPC_OVL_ACCU2_0);
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+ DUMPREG(i, DISPC_OVL_ACCU2_1);
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+ }
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+ if (dss_has_feature(FEAT_ATTR2))
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+ DUMPREG(i, DISPC_OVL_ATTRIBUTES2);
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+ if (dss_has_feature(FEAT_PRELOAD))
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+ DUMPREG(i, DISPC_OVL_PRELOAD);
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}
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- if (dss_has_feature(FEAT_ATTR2))
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ATTRIBUTES2);
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- if (dss_has_feature(FEAT_PRELOAD))
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_PRELOAD);
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#undef DISPC_REG
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#undef DUMPREG
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#define DISPC_REG(plane, name, i) name(plane, i)
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#define DUMPREG(plane, name, i) \
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- seq_printf(s, "%s_%d(%s)%*s %08x\n", #name, i, #plane, \
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- 46 - strlen(#name) - strlen(#plane), " ", \
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+ seq_printf(s, "%s_%d(%s)%*s %08x\n", #name, i, p_names[plane], \
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+ 46 - strlen(#name) - strlen(p_names[plane]), " ", \
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dispc_read_reg(DISPC_REG(plane, name, i)))
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- /* VIDEO1 coefficient registers */
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 0);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 1);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 2);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 3);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 4);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 5);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 6);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 7);
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-
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 0);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 1);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 2);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 3);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 4);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 5);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 6);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 7);
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-
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 0);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 1);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 2);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 3);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 4);
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+ /* Video pipeline coefficient registers */
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- if (dss_has_feature(FEAT_FIR_COEF_V)) {
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 0);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 1);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 2);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 3);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 4);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 5);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 6);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 7);
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- }
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+ /* start from OMAP_DSS_VIDEO1 */
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+ for (i = 1; i < dss_feat_get_num_ovls(); i++) {
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+ for (j = 0; j < 8; j++)
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+ DUMPREG(i, DISPC_OVL_FIR_COEF_H, j);
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- if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 0);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 1);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 2);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 3);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 4);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 5);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 6);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 7);
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-
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 0);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 1);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 2);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 3);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 4);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 5);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 6);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 7);
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-
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 0);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 1);
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|
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 2);
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|
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 3);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 4);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 5);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 6);
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- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 7);
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|
|
- }
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|
|
-
|
|
|
- /* VIDEO2 coefficient registers */
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|
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 0);
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|
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 1);
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|
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 2);
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|
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 3);
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|
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 4);
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|
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 5);
|
|
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 6);
|
|
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- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 7);
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|
|
-
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 0);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 1);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 2);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 3);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 4);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 5);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 6);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 7);
|
|
|
-
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 0);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 1);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 2);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 3);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 4);
|
|
|
- if (dss_has_feature(FEAT_FIR_COEF_V)) {
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 0);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 1);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 2);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 3);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 4);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 5);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 6);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 7);
|
|
|
- }
|
|
|
+ for (j = 0; j < 8; j++)
|
|
|
+ DUMPREG(i, DISPC_OVL_FIR_COEF_HV, j);
|
|
|
|
|
|
- if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 0);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 1);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 2);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 3);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 4);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 5);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 6);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 7);
|
|
|
-
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 0);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 1);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 2);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 3);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 4);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 5);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 6);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 7);
|
|
|
-
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 0);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 1);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 2);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 3);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 4);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 5);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 6);
|
|
|
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 7);
|
|
|
+ for (j = 0; j < 5; j++)
|
|
|
+ DUMPREG(i, DISPC_OVL_CONV_COEF, j);
|
|
|
+
|
|
|
+ if (dss_has_feature(FEAT_FIR_COEF_V)) {
|
|
|
+ for (j = 0; j < 8; j++)
|
|
|
+ DUMPREG(i, DISPC_OVL_FIR_COEF_V, j);
|
|
|
+ }
|
|
|
+
|
|
|
+ if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
|
|
|
+ for (j = 0; j < 8; j++)
|
|
|
+ DUMPREG(i, DISPC_OVL_FIR_COEF_H2, j);
|
|
|
+
|
|
|
+ for (j = 0; j < 8; j++)
|
|
|
+ DUMPREG(i, DISPC_OVL_FIR_COEF_HV2, j);
|
|
|
+
|
|
|
+ for (j = 0; j < 8; j++)
|
|
|
+ DUMPREG(i, DISPC_OVL_FIR_COEF_V2, j);
|
|
|
+ }
|
|
|
}
|
|
|
|
|
|
dispc_runtime_put();
|