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@@ -968,6 +968,18 @@ void intel_ring_setup_status_page(struct intel_ring_buffer *ring)
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I915_WRITE(mmio, (u32)ring->status_page.gfx_addr);
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POSTING_READ(mmio);
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+
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+ /* Flush the TLB for this page */
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+ if (INTEL_INFO(dev)->gen >= 6) {
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+ u32 reg = RING_INSTPM(ring->mmio_base);
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+ I915_WRITE(reg,
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+ _MASKED_BIT_ENABLE(INSTPM_TLB_INVALIDATE |
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+ INSTPM_SYNC_FLUSH));
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+ if (wait_for((I915_READ(reg) & INSTPM_SYNC_FLUSH) == 0,
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+ 1000))
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+ DRM_ERROR("%s: wait for SyncFlush to complete for TLB invalidation timed out\n",
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+ ring->name);
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+ }
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}
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static int
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