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@@ -303,7 +303,7 @@ static void handle_e_ibstatuschanged(struct ipath_devdata *dd,
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* Flush all queued sends when link went to DOWN or INIT,
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* to be sure that they don't block SMA and other MAD packets
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*/
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- ipath_cancel_sends(dd);
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+ ipath_cancel_sends(dd, 1);
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}
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else if (lstate == IPATH_IBSTATE_INIT || lstate == IPATH_IBSTATE_ARM ||
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lstate == IPATH_IBSTATE_ACTIVE) {
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@@ -517,10 +517,7 @@ static int handle_errors(struct ipath_devdata *dd, ipath_err_t errs)
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supp_msgs = handle_frequent_errors(dd, errs, msg, &noprint);
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- /*
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- * don't report errors that are masked (includes those always
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- * ignored)
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- */
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+ /* don't report errors that are masked */
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errs &= ~dd->ipath_maskederrs;
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/* do these first, they are most important */
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@@ -566,19 +563,19 @@ static int handle_errors(struct ipath_devdata *dd, ipath_err_t errs)
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* ones on this particular interrupt, which also isn't great
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*/
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dd->ipath_maskederrs |= dd->ipath_lasterror | errs;
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+ dd->ipath_errormask &= ~dd->ipath_maskederrs;
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ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
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- ~dd->ipath_maskederrs);
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+ dd->ipath_errormask);
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s_iserr = ipath_decode_err(msg, sizeof msg,
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- (dd->ipath_maskederrs & ~dd->
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- ipath_ignorederrs));
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+ dd->ipath_maskederrs);
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- if ((dd->ipath_maskederrs & ~dd->ipath_ignorederrs) &
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+ if (dd->ipath_maskederrs &
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~(INFINIPATH_E_RRCVEGRFULL |
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INFINIPATH_E_RRCVHDRFULL | INFINIPATH_E_PKTERRS))
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ipath_dev_err(dd, "Temporarily disabling "
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"error(s) %llx reporting; too frequent (%s)\n",
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- (unsigned long long) (dd->ipath_maskederrs &
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- ~dd->ipath_ignorederrs), msg);
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+ (unsigned long long)dd->ipath_maskederrs,
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+ msg);
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else {
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/*
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* rcvegrfull and rcvhdrqfull are "normal",
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@@ -793,19 +790,22 @@ void ipath_clear_freeze(struct ipath_devdata *dd)
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/* disable error interrupts, to avoid confusion */
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ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask, 0ULL);
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+ /* also disable interrupts; errormask is sometimes overwriten */
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+ ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
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+
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/*
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* clear all sends, because they have may been
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* completed by usercode while in freeze mode, and
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* therefore would not be sent, and eventually
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* might cause the process to run out of bufs
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*/
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- ipath_cancel_sends(dd);
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+ ipath_cancel_sends(dd, 0);
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ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
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dd->ipath_control);
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/* ensure pio avail updates continue */
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ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
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- dd->ipath_sendctrl & ~IPATH_S_PIOBUFAVAILUPD);
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+ dd->ipath_sendctrl & ~INFINIPATH_S_PIOBUFAVAILUPD);
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ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
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ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
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dd->ipath_sendctrl);
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@@ -817,7 +817,7 @@ void ipath_clear_freeze(struct ipath_devdata *dd)
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for (i = 0; i < dd->ipath_pioavregs; i++) {
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/* deal with 6110 chip bug */
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im = i > 3 ? ((i&1) ? i-1 : i+1) : i;
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- val = ipath_read_kreg64(dd, 0x1000+(im*sizeof(u64)));
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+ val = ipath_read_kreg64(dd, (0x1000/sizeof(u64))+im);
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dd->ipath_pioavailregs_dma[i] = dd->ipath_pioavailshadow[i]
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= le64_to_cpu(val);
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}
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@@ -832,7 +832,8 @@ void ipath_clear_freeze(struct ipath_devdata *dd)
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ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear,
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E_SPKT_ERRS_IGNORE);
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ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
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- ~dd->ipath_maskederrs);
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+ dd->ipath_errormask);
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+ ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, -1LL);
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ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, 0ULL);
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}
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@@ -1002,7 +1003,6 @@ irqreturn_t ipath_intr(int irq, void *data)
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u32 istat, chk0rcv = 0;
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ipath_err_t estat = 0;
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irqreturn_t ret;
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- u32 oldhead, curtail;
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static unsigned unexpected = 0;
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static const u32 port0rbits = (1U<<INFINIPATH_I_RCVAVAIL_SHIFT) |
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(1U<<INFINIPATH_I_RCVURG_SHIFT);
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@@ -1035,36 +1035,6 @@ irqreturn_t ipath_intr(int irq, void *data)
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goto bail;
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}
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- /*
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- * We try to avoid reading the interrupt status register, since
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- * that's a PIO read, and stalls the processor for up to about
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- * ~0.25 usec. The idea is that if we processed a port0 packet,
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- * we blindly clear the port 0 receive interrupt bits, and nothing
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- * else, then return. If other interrupts are pending, the chip
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- * will re-interrupt us as soon as we write the intclear register.
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- * We then won't process any more kernel packets (if not the 2nd
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- * time, then the 3rd or 4th) and we'll then handle the other
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- * interrupts. We clear the interrupts first so that we don't
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- * lose intr for later packets that arrive while we are processing.
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- */
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- oldhead = dd->ipath_port0head;
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- curtail = (u32)le64_to_cpu(*dd->ipath_hdrqtailptr);
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- if (oldhead != curtail) {
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- if (dd->ipath_flags & IPATH_GPIO_INTR) {
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- ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_clear,
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- (u64) (1 << IPATH_GPIO_PORT0_BIT));
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- istat = port0rbits | INFINIPATH_I_GPIO;
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- }
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- else
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- istat = port0rbits;
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- ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, istat);
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- ipath_kreceive(dd);
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- if (oldhead != dd->ipath_port0head) {
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- ipath_stats.sps_fastrcvint++;
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- goto done;
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- }
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- }
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-
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istat = ipath_read_kreg32(dd, dd->ipath_kregs->kr_intstatus);
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if (unlikely(!istat)) {
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@@ -1225,7 +1195,6 @@ irqreturn_t ipath_intr(int irq, void *data)
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handle_layer_pioavail(dd);
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}
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-done:
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ret = IRQ_HANDLED;
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bail:
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Linus Torvalds