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@@ -1858,6 +1858,224 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
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}
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EXPORT_SYMBOL_GPL(rt2800_init_eeprom);
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+/*
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+ * RF value list for rt28x0
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+ * Supports: 2.4 GHz (all) & 5.2 GHz (RF2850 & RF2750)
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+ */
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+static const struct rf_channel rf_vals[] = {
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+ { 1, 0x18402ecc, 0x184c0786, 0x1816b455, 0x1800510b },
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+ { 2, 0x18402ecc, 0x184c0786, 0x18168a55, 0x1800519f },
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+ { 3, 0x18402ecc, 0x184c078a, 0x18168a55, 0x1800518b },
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+ { 4, 0x18402ecc, 0x184c078a, 0x18168a55, 0x1800519f },
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+ { 5, 0x18402ecc, 0x184c078e, 0x18168a55, 0x1800518b },
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+ { 6, 0x18402ecc, 0x184c078e, 0x18168a55, 0x1800519f },
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+ { 7, 0x18402ecc, 0x184c0792, 0x18168a55, 0x1800518b },
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+ { 8, 0x18402ecc, 0x184c0792, 0x18168a55, 0x1800519f },
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+ { 9, 0x18402ecc, 0x184c0796, 0x18168a55, 0x1800518b },
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+ { 10, 0x18402ecc, 0x184c0796, 0x18168a55, 0x1800519f },
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+ { 11, 0x18402ecc, 0x184c079a, 0x18168a55, 0x1800518b },
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+ { 12, 0x18402ecc, 0x184c079a, 0x18168a55, 0x1800519f },
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+ { 13, 0x18402ecc, 0x184c079e, 0x18168a55, 0x1800518b },
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+ { 14, 0x18402ecc, 0x184c07a2, 0x18168a55, 0x18005193 },
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+
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+ /* 802.11 UNI / HyperLan 2 */
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+ { 36, 0x18402ecc, 0x184c099a, 0x18158a55, 0x180ed1a3 },
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+ { 38, 0x18402ecc, 0x184c099e, 0x18158a55, 0x180ed193 },
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+ { 40, 0x18402ec8, 0x184c0682, 0x18158a55, 0x180ed183 },
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+ { 44, 0x18402ec8, 0x184c0682, 0x18158a55, 0x180ed1a3 },
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+ { 46, 0x18402ec8, 0x184c0686, 0x18158a55, 0x180ed18b },
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+ { 48, 0x18402ec8, 0x184c0686, 0x18158a55, 0x180ed19b },
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+ { 52, 0x18402ec8, 0x184c068a, 0x18158a55, 0x180ed193 },
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+ { 54, 0x18402ec8, 0x184c068a, 0x18158a55, 0x180ed1a3 },
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+ { 56, 0x18402ec8, 0x184c068e, 0x18158a55, 0x180ed18b },
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+ { 60, 0x18402ec8, 0x184c0692, 0x18158a55, 0x180ed183 },
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+ { 62, 0x18402ec8, 0x184c0692, 0x18158a55, 0x180ed193 },
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+ { 64, 0x18402ec8, 0x184c0692, 0x18158a55, 0x180ed1a3 },
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+
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+ /* 802.11 HyperLan 2 */
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+ { 100, 0x18402ec8, 0x184c06b2, 0x18178a55, 0x180ed783 },
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+ { 102, 0x18402ec8, 0x184c06b2, 0x18578a55, 0x180ed793 },
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+ { 104, 0x18402ec8, 0x185c06b2, 0x18578a55, 0x180ed1a3 },
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+ { 108, 0x18402ecc, 0x185c0a32, 0x18578a55, 0x180ed193 },
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+ { 110, 0x18402ecc, 0x184c0a36, 0x18178a55, 0x180ed183 },
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+ { 112, 0x18402ecc, 0x184c0a36, 0x18178a55, 0x180ed19b },
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+ { 116, 0x18402ecc, 0x184c0a3a, 0x18178a55, 0x180ed1a3 },
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+ { 118, 0x18402ecc, 0x184c0a3e, 0x18178a55, 0x180ed193 },
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+ { 120, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed183 },
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+ { 124, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed193 },
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+ { 126, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed15b },
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+ { 128, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed1a3 },
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+ { 132, 0x18402ec4, 0x184c0386, 0x18178a55, 0x180ed18b },
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+ { 134, 0x18402ec4, 0x184c0386, 0x18178a55, 0x180ed193 },
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+ { 136, 0x18402ec4, 0x184c0386, 0x18178a55, 0x180ed19b },
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+ { 140, 0x18402ec4, 0x184c038a, 0x18178a55, 0x180ed183 },
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+
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+ /* 802.11 UNII */
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+ { 149, 0x18402ec4, 0x184c038a, 0x18178a55, 0x180ed1a7 },
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+ { 151, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed187 },
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+ { 153, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed18f },
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+ { 157, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed19f },
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+ { 159, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed1a7 },
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+ { 161, 0x18402ec4, 0x184c0392, 0x18178a55, 0x180ed187 },
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+ { 165, 0x18402ec4, 0x184c0392, 0x18178a55, 0x180ed197 },
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+ { 167, 0x18402ec4, 0x184c03d2, 0x18179855, 0x1815531f },
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+ { 169, 0x18402ec4, 0x184c03d2, 0x18179855, 0x18155327 },
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+ { 171, 0x18402ec4, 0x184c03d6, 0x18179855, 0x18155307 },
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+ { 173, 0x18402ec4, 0x184c03d6, 0x18179855, 0x1815530f },
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+
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+ /* 802.11 Japan */
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+ { 184, 0x15002ccc, 0x1500491e, 0x1509be55, 0x150c0a0b },
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+ { 188, 0x15002ccc, 0x15004922, 0x1509be55, 0x150c0a13 },
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+ { 192, 0x15002ccc, 0x15004926, 0x1509be55, 0x150c0a1b },
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+ { 196, 0x15002ccc, 0x1500492a, 0x1509be55, 0x150c0a23 },
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+ { 208, 0x15002ccc, 0x1500493a, 0x1509be55, 0x150c0a13 },
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+ { 212, 0x15002ccc, 0x1500493e, 0x1509be55, 0x150c0a1b },
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+ { 216, 0x15002ccc, 0x15004982, 0x1509be55, 0x150c0a23 },
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+};
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+
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+/*
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+ * RF value list for rt3070
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+ * Supports: 2.4 GHz
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+ */
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+static const struct rf_channel rf_vals_3070[] = {
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+ {1, 241, 2, 2 },
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+ {2, 241, 2, 7 },
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+ {3, 242, 2, 2 },
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+ {4, 242, 2, 7 },
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+ {5, 243, 2, 2 },
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+ {6, 243, 2, 7 },
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+ {7, 244, 2, 2 },
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+ {8, 244, 2, 7 },
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+ {9, 245, 2, 2 },
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+ {10, 245, 2, 7 },
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+ {11, 246, 2, 2 },
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+ {12, 246, 2, 7 },
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+ {13, 247, 2, 2 },
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+ {14, 248, 2, 4 },
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+};
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+
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+int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
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+{
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+ struct rt2x00_chip *chip = &rt2x00dev->chip;
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+ struct hw_mode_spec *spec = &rt2x00dev->spec;
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+ struct channel_info *info;
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+ char *tx_power1;
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+ char *tx_power2;
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+ unsigned int i;
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+ u16 eeprom;
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+
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+ /*
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+ * Initialize all hw fields.
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+ */
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+ rt2x00dev->hw->flags =
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+ IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
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+ IEEE80211_HW_SIGNAL_DBM |
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+ IEEE80211_HW_SUPPORTS_PS |
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+ IEEE80211_HW_PS_NULLFUNC_STACK;
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+
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+ if (rt2x00_intf_is_usb(rt2x00dev))
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+ rt2x00dev->hw->extra_tx_headroom =
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+ TXINFO_DESC_SIZE + TXWI_DESC_SIZE;
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+ else if (rt2x00_intf_is_pci(rt2x00dev))
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+ rt2x00dev->hw->extra_tx_headroom = TXWI_DESC_SIZE;
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+
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+ SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
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+ SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
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+ rt2x00_eeprom_addr(rt2x00dev,
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+ EEPROM_MAC_ADDR_0));
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+
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+ rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
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+
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+ /*
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+ * Initialize hw_mode information.
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+ */
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+ spec->supported_bands = SUPPORT_BAND_2GHZ;
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+ spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
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+
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+ if (rt2x00_rf(chip, RF2820) ||
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+ rt2x00_rf(chip, RF2720) ||
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+ (rt2x00_intf_is_pci(rt2x00dev) &&
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+ (rt2x00_rf(chip, RF3020) ||
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+ rt2x00_rf(chip, RF3021) ||
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+ rt2x00_rf(chip, RF3022) ||
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+ rt2x00_rf(chip, RF2020) ||
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+ rt2x00_rf(chip, RF3052)))) {
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+ spec->num_channels = 14;
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+ spec->channels = rf_vals;
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+ } else if (rt2x00_rf(chip, RF2850) ||
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+ rt2x00_rf(chip, RF2750)) {
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+ spec->supported_bands |= SUPPORT_BAND_5GHZ;
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+ spec->num_channels = ARRAY_SIZE(rf_vals);
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+ spec->channels = rf_vals;
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+ } else if (rt2x00_intf_is_usb(rt2x00dev) &&
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+ (rt2x00_rf(chip, RF3020) ||
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+ rt2x00_rf(chip, RF2020))) {
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+ spec->num_channels = ARRAY_SIZE(rf_vals_3070);
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+ spec->channels = rf_vals_3070;
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+ }
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+
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+ /*
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+ * Initialize HT information.
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+ */
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+ spec->ht.ht_supported = true;
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+ spec->ht.cap =
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+ IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
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+ IEEE80211_HT_CAP_GRN_FLD |
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+ IEEE80211_HT_CAP_SGI_20 |
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+ IEEE80211_HT_CAP_SGI_40 |
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+ IEEE80211_HT_CAP_TX_STBC |
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+ IEEE80211_HT_CAP_RX_STBC |
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+ IEEE80211_HT_CAP_PSMP_SUPPORT;
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+ spec->ht.ampdu_factor = 3;
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+ spec->ht.ampdu_density = 4;
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+ spec->ht.mcs.tx_params =
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+ IEEE80211_HT_MCS_TX_DEFINED |
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+ IEEE80211_HT_MCS_TX_RX_DIFF |
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+ ((rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH) - 1) <<
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+ IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
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+
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+ switch (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH)) {
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+ case 3:
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+ spec->ht.mcs.rx_mask[2] = 0xff;
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+ case 2:
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+ spec->ht.mcs.rx_mask[1] = 0xff;
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+ case 1:
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+ spec->ht.mcs.rx_mask[0] = 0xff;
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+ spec->ht.mcs.rx_mask[4] = 0x1; /* MCS32 */
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+ break;
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+ }
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+
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+ /*
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+ * Create channel information array
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+ */
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+ info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL);
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+ if (!info)
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+ return -ENOMEM;
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+
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+ spec->channels_info = info;
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+
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+ tx_power1 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_BG1);
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+ tx_power2 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_BG2);
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+
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+ for (i = 0; i < 14; i++) {
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+ info[i].tx_power1 = TXPOWER_G_FROM_DEV(tx_power1[i]);
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+ info[i].tx_power2 = TXPOWER_G_FROM_DEV(tx_power2[i]);
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+ }
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+
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+ if (spec->num_channels > 14) {
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+ tx_power1 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A1);
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+ tx_power2 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A2);
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+
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+ for (i = 14; i < spec->num_channels; i++) {
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+ info[i].tx_power1 = TXPOWER_A_FROM_DEV(tx_power1[i]);
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+ info[i].tx_power2 = TXPOWER_A_FROM_DEV(tx_power2[i]);
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+ }
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+ }
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+
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+ return 0;
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+}
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+EXPORT_SYMBOL_GPL(rt2800_probe_hw_mode);
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+
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/*
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* IEEE80211 stack callback functions.
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*/
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