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@@ -0,0 +1,67 @@
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+/*
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+ * Timings and Geometry for Samsung K3PE0E000B memory part
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+ */
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+
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+/ {
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+ samsung_K3PE0E000B: lpddr2 {
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+ compatible = "Samsung,K3PE0E000B","jedec,lpddr2-s4";
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+ density = <4096>;
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+ io-width = <32>;
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+
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+ tRPab-min-tck = <3>;
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+ tRCD-min-tck = <3>;
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+ tWR-min-tck = <3>;
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+ tRASmin-min-tck = <3>;
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+ tRRD-min-tck = <2>;
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+ tWTR-min-tck = <2>;
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+ tXP-min-tck = <2>;
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+ tRTP-min-tck = <2>;
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+ tCKE-min-tck = <3>;
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+ tCKESR-min-tck = <3>;
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+ tFAW-min-tck = <8>;
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+
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+ timings_samsung_K3PE0E000B_533MHz: lpddr2-timings@0 {
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+ compatible = "jedec,lpddr2-timings";
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+ min-freq = <10000000>;
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+ max-freq = <533333333>;
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+ tRPab = <21000>;
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+ tRCD = <18000>;
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+ tWR = <15000>;
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+ tRAS-min = <42000>;
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+ tRRD = <10000>;
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+ tWTR = <7500>;
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+ tXP = <7500>;
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+ tRTP = <7500>;
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+ tCKESR = <15000>;
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+ tDQSCK-max = <5500>;
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+ tFAW = <50000>;
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+ tZQCS = <90000>;
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+ tZQCL = <360000>;
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+ tZQinit = <1000000>;
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+ tRAS-max-ns = <70000>;
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+ tDQSCK-max-derated = <6000>;
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+ };
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+
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+ timings_samsung_K3PE0E000B_266MHz: lpddr2-timings@1 {
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+ compatible = "jedec,lpddr2-timings";
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+ min-freq = <10000000>;
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+ max-freq = <266666666>;
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+ tRPab = <21000>;
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+ tRCD = <18000>;
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+ tWR = <15000>;
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+ tRAS-min = <42000>;
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+ tRRD = <10000>;
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+ tWTR = <7500>;
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+ tXP = <7500>;
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+ tRTP = <7500>;
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+ tCKESR = <15000>;
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+ tDQSCK-max = <5500>;
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+ tFAW = <50000>;
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+ tZQCS = <90000>;
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+ tZQCL = <360000>;
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+ tZQinit = <1000000>;
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+ tRAS-max-ns = <70000>;
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+ tDQSCK-max-derated = <6000>;
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+ };
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+ };
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+};
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