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@@ -0,0 +1,520 @@
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+/*
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+ * "RTT as Real Time Clock" driver for AT91SAM9 SoC family
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+ *
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+ * (C) 2007 Michel Benoit
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+ *
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+ * Based on rtc-at91rm9200.c by Rick Bronson
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License
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+ * as published by the Free Software Foundation; either version
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+ * 2 of the License, or (at your option) any later version.
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+ */
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+
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+#include <linux/module.h>
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+#include <linux/kernel.h>
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+#include <linux/platform_device.h>
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+#include <linux/time.h>
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+#include <linux/rtc.h>
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+#include <linux/interrupt.h>
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+#include <linux/ioctl.h>
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+
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+#include <asm/mach/time.h>
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+#include <asm/arch/board.h>
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+#include <asm/arch/at91_rtt.h>
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+
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+
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+/*
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+ * This driver uses two configurable hardware resources that live in the
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+ * AT91SAM9 backup power domain (intended to be powered at all times)
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+ * to implement the Real Time Clock interfaces
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+ *
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+ * - A "Real-time Timer" (RTT) counts up in seconds from a base time.
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+ * We can't assign the counter value (CRTV) ... but we can reset it.
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+ *
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+ * - One of the "General Purpose Backup Registers" (GPBRs) holds the
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+ * base time, normally an offset from the beginning of the POSIX
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+ * epoch (1970-Jan-1 00:00:00 UTC). Some systems also include the
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+ * local timezone's offset.
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+ *
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+ * The RTC's value is the RTT counter plus that offset. The RTC's alarm
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+ * is likewise a base (ALMV) plus that offset.
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+ *
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+ * Not all RTTs will be used as RTCs; some systems have multiple RTTs to
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+ * choose from, or a "real" RTC module. All systems have multiple GPBR
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+ * registers available, likewise usable for more than "RTC" support.
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+ */
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+
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+/*
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+ * We store ALARM_DISABLED in ALMV to record that no alarm is set.
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+ * It's also the reset value for that field.
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+ */
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+#define ALARM_DISABLED ((u32)~0)
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+
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+
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+struct sam9_rtc {
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+ void __iomem *rtt;
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+ struct rtc_device *rtcdev;
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+ u32 imr;
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+};
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+
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+#define rtt_readl(rtc, field) \
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+ __raw_readl((rtc)->rtt + AT91_RTT_ ## field)
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+#define rtt_writel(rtc, field, val) \
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+ __raw_writel((val), (rtc)->rtt + AT91_RTT_ ## field)
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+
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+#define gpbr_readl(rtc) \
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+ at91_sys_read(AT91_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR)
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+#define gpbr_writel(rtc, val) \
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+ at91_sys_write(AT91_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR, (val))
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+
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+/*
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+ * Read current time and date in RTC
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+ */
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+static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm)
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+{
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+ struct sam9_rtc *rtc = dev_get_drvdata(dev);
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+ u32 secs, secs2;
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+ u32 offset;
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+
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+ /* read current time offset */
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+ offset = gpbr_readl(rtc);
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+ if (offset == 0)
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+ return -EILSEQ;
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+
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+ /* reread the counter to help sync the two clock domains */
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+ secs = rtt_readl(rtc, VR);
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+ secs2 = rtt_readl(rtc, VR);
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+ if (secs != secs2)
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+ secs = rtt_readl(rtc, VR);
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+
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+ rtc_time_to_tm(offset + secs, tm);
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+
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+ dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "readtime",
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+ 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
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+ tm->tm_hour, tm->tm_min, tm->tm_sec);
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+
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+ return 0;
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+}
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+
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+/*
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+ * Set current time and date in RTC
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+ */
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+static int at91_rtc_settime(struct device *dev, struct rtc_time *tm)
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+{
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+ struct sam9_rtc *rtc = dev_get_drvdata(dev);
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+ int err;
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+ u32 offset, alarm, mr;
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+ unsigned long secs;
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+
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+ dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "settime",
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+ 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
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+ tm->tm_hour, tm->tm_min, tm->tm_sec);
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+
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+ err = rtc_tm_to_time(tm, &secs);
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+ if (err != 0)
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+ return err;
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+
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+ mr = rtt_readl(rtc, MR);
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+
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+ /* disable interrupts */
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+ rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));
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+
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+ /* read current time offset */
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+ offset = gpbr_readl(rtc);
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+
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+ /* store the new base time in a battery backup register */
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+ secs += 1;
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+ gpbr_writel(rtc, secs);
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+
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+ /* adjust the alarm time for the new base */
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+ alarm = rtt_readl(rtc, AR);
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+ if (alarm != ALARM_DISABLED) {
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+ if (offset > secs) {
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+ /* time jumped backwards, increase time until alarm */
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+ alarm += (offset - secs);
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+ } else if ((alarm + offset) > secs) {
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+ /* time jumped forwards, decrease time until alarm */
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+ alarm -= (secs - offset);
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+ } else {
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+ /* time jumped past the alarm, disable alarm */
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+ alarm = ALARM_DISABLED;
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+ mr &= ~AT91_RTT_ALMIEN;
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+ }
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+ rtt_writel(rtc, AR, alarm);
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+ }
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+
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+ /* reset the timer, and re-enable interrupts */
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+ rtt_writel(rtc, MR, mr | AT91_RTT_RTTRST);
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+
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+ return 0;
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+}
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+
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+static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
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+{
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+ struct sam9_rtc *rtc = dev_get_drvdata(dev);
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+ struct rtc_time *tm = &alrm->time;
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+ u32 alarm = rtt_readl(rtc, AR);
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+ u32 offset;
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+
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+ offset = gpbr_readl(rtc);
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+ if (offset == 0)
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+ return -EILSEQ;
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+
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+ memset(alrm, 0, sizeof(alrm));
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+ if (alarm != ALARM_DISABLED && offset != 0) {
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+ rtc_time_to_tm(offset + alarm, tm);
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+
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+ dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "readalarm",
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+ 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
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+ tm->tm_hour, tm->tm_min, tm->tm_sec);
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+
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+ if (rtt_readl(rtc, MR) & AT91_RTT_ALMIEN)
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+ alrm->enabled = 1;
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+ }
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+
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+ return 0;
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+}
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+
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+static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
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+{
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+ struct sam9_rtc *rtc = dev_get_drvdata(dev);
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+ struct rtc_time *tm = &alrm->time;
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+ unsigned long secs;
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+ u32 offset;
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+ u32 mr;
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+ int err;
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+
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+ err = rtc_tm_to_time(tm, &secs);
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+ if (err != 0)
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+ return err;
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+
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+ offset = gpbr_readl(rtc);
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+ if (offset == 0) {
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+ /* time is not set */
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+ return -EILSEQ;
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+ }
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+ mr = rtt_readl(rtc, MR);
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+ rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN);
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+
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+ /* alarm in the past? finish and leave disabled */
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+ if (secs <= offset) {
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+ rtt_writel(rtc, AR, ALARM_DISABLED);
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+ return 0;
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+ }
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+
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+ /* else set alarm and maybe enable it */
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+ rtt_writel(rtc, AR, secs - offset);
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+ if (alrm->enabled)
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+ rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN);
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+
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+ dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "setalarm",
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+ tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_hour,
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+ tm->tm_min, tm->tm_sec);
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+
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+ return 0;
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+}
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+
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+/*
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+ * Handle commands from user-space
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+ */
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+static int at91_rtc_ioctl(struct device *dev, unsigned int cmd,
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+ unsigned long arg)
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+{
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+ struct sam9_rtc *rtc = dev_get_drvdata(dev);
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+ int ret = 0;
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+ u32 mr = rtt_readl(rtc, MR);
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+
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+ dev_dbg(dev, "ioctl: cmd=%08x, arg=%08lx, mr %08x\n", cmd, arg, mr);
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+
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+ switch (cmd) {
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+ case RTC_AIE_OFF: /* alarm off */
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+ rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN);
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+ break;
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+ case RTC_AIE_ON: /* alarm on */
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+ rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN);
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+ break;
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+ case RTC_UIE_OFF: /* update off */
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+ rtt_writel(rtc, MR, mr & ~AT91_RTT_RTTINCIEN);
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+ break;
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+ case RTC_UIE_ON: /* update on */
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+ rtt_writel(rtc, MR, mr | AT91_RTT_RTTINCIEN);
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+ break;
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+ default:
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+ ret = -ENOIOCTLCMD;
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+ break;
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+ }
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+
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+ return ret;
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+}
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+
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+/*
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+ * Provide additional RTC information in /proc/driver/rtc
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+ */
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+static int at91_rtc_proc(struct device *dev, struct seq_file *seq)
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+{
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+ struct sam9_rtc *rtc = dev_get_drvdata(dev);
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+ u32 mr = mr = rtt_readl(rtc, MR);
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+
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+ seq_printf(seq, "update_IRQ\t: %s\n",
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+ (mr & AT91_RTT_RTTINCIEN) ? "yes" : "no");
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+ return 0;
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+}
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+
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+/*
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+ * IRQ handler for the RTC
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+ */
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+static irqreturn_t at91_rtc_interrupt(int irq, void *_rtc)
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+{
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+ struct sam9_rtc *rtc = _rtc;
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+ u32 sr, mr;
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+ unsigned long events = 0;
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+
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+ /* Shared interrupt may be for another device. Note: reading
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+ * SR clears it, so we must only read it in this irq handler!
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+ */
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+ mr = rtt_readl(rtc, MR) & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
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+ sr = rtt_readl(rtc, SR) & mr;
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+ if (!sr)
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+ return IRQ_NONE;
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+
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+ /* alarm status */
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+ if (sr & AT91_RTT_ALMS)
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+ events |= (RTC_AF | RTC_IRQF);
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+
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+ /* timer update/increment */
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+ if (sr & AT91_RTT_RTTINC)
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+ events |= (RTC_UF | RTC_IRQF);
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+
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+ rtc_update_irq(rtc->rtcdev, 1, events);
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+
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+ pr_debug("%s: num=%ld, events=0x%02lx\n", __FUNCTION__,
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+ events >> 8, events & 0x000000FF);
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+
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+ return IRQ_HANDLED;
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+}
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+
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+static const struct rtc_class_ops at91_rtc_ops = {
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+ .ioctl = at91_rtc_ioctl,
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+ .read_time = at91_rtc_readtime,
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+ .set_time = at91_rtc_settime,
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+ .read_alarm = at91_rtc_readalarm,
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+ .set_alarm = at91_rtc_setalarm,
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+ .proc = at91_rtc_proc,
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+};
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+
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+/*
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+ * Initialize and install RTC driver
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+ */
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+static int __init at91_rtc_probe(struct platform_device *pdev)
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+{
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+ struct resource *r;
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+ struct sam9_rtc *rtc;
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+ int ret;
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+ u32 mr;
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+
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+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ if (!r)
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+ return -ENODEV;
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+
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+ rtc = kzalloc(sizeof *rtc, GFP_KERNEL);
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+ if (!rtc)
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+ return -ENOMEM;
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+
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+ platform_set_drvdata(pdev, rtc);
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+ rtc->rtt = (void __force __iomem *) (AT91_VA_BASE_SYS - AT91_BASE_SYS);
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+ rtc->rtt += r->start;
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+
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+ mr = rtt_readl(rtc, MR);
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+
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+ /* unless RTT is counting at 1 Hz, re-initialize it */
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+ if ((mr & AT91_RTT_RTPRES) != AT91_SLOW_CLOCK) {
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+ mr = AT91_RTT_RTTRST | (AT91_SLOW_CLOCK & AT91_RTT_RTPRES);
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+ gpbr_writel(rtc, 0);
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+ }
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+
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+ /* disable all interrupts (same as on shutdown path) */
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+ mr &= ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
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+ rtt_writel(rtc, MR, mr);
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+
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+ rtc->rtcdev = rtc_device_register(pdev->name, &pdev->dev,
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+ &at91_rtc_ops, THIS_MODULE);
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+ if (IS_ERR(rtc->rtcdev)) {
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+ ret = PTR_ERR(rtc->rtcdev);
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+ goto fail;
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+ }
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+
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+ /* register irq handler after we know what name we'll use */
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+ ret = request_irq(AT91_ID_SYS, at91_rtc_interrupt,
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+ IRQF_DISABLED | IRQF_SHARED,
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+ rtc->rtcdev->dev.bus_id, rtc);
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+ if (ret) {
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+ dev_dbg(&pdev->dev, "can't share IRQ %d?\n", AT91_ID_SYS);
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+ rtc_device_unregister(rtc->rtcdev);
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+ goto fail;
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+ }
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+
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+ /* NOTE: sam9260 rev A silicon has a ROM bug which resets the
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+ * RTT on at least some reboots. If you have that chip, you must
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+ * initialize the time from some external source like a GPS, wall
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+ * clock, discrete RTC, etc
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+ */
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+
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+ if (gpbr_readl(rtc) == 0)
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+ dev_warn(&pdev->dev, "%s: SET TIME!\n",
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+ rtc->rtcdev->dev.bus_id);
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+
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+ return 0;
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+
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+fail:
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+ platform_set_drvdata(pdev, NULL);
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+ kfree(rtc);
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+ return ret;
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+}
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+
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+/*
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+ * Disable and remove the RTC driver
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+ */
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+static int __exit at91_rtc_remove(struct platform_device *pdev)
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+{
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+ struct sam9_rtc *rtc = platform_get_drvdata(pdev);
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+ u32 mr = rtt_readl(rtc, MR);
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+
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+ /* disable all interrupts */
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+ rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));
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+ free_irq(AT91_ID_SYS, rtc);
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+
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+ rtc_device_unregister(rtc->rtcdev);
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+
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+ platform_set_drvdata(pdev, NULL);
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+ kfree(rtc);
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+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static void at91_rtc_shutdown(struct platform_device *pdev)
|
|
|
+{
|
|
|
+ struct sam9_rtc *rtc = platform_get_drvdata(pdev);
|
|
|
+ u32 mr = rtt_readl(rtc, MR);
|
|
|
+
|
|
|
+ rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
|
|
|
+ rtt_writel(rtc, MR, mr & ~rtc->imr);
|
|
|
+}
|
|
|
+
|
|
|
+#ifdef CONFIG_PM
|
|
|
+
|
|
|
+/* AT91SAM9 RTC Power management control */
|
|
|
+
|
|
|
+static int at91_rtc_suspend(struct platform_device *pdev,
|
|
|
+ pm_message_t state)
|
|
|
+{
|
|
|
+ struct sam9_rtc *rtc = platform_get_drvdata(pdev);
|
|
|
+ u32 mr = rtt_readl(rtc, MR);
|
|
|
+
|
|
|
+ /*
|
|
|
+ * This IRQ is shared with DBGU and other hardware which isn't
|
|
|
+ * necessarily a wakeup event source.
|
|
|
+ */
|
|
|
+ rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
|
|
|
+ if (rtc->imr) {
|
|
|
+ if (device_may_wakeup(&pdev->dev) && (mr & AT91_RTT_ALMIEN)) {
|
|
|
+ enable_irq_wake(AT91_ID_SYS);
|
|
|
+ /* don't let RTTINC cause wakeups */
|
|
|
+ if (mr & AT91_RTT_RTTINCIEN)
|
|
|
+ rtt_writel(rtc, MR, mr & ~AT91_RTT_RTTINCIEN);
|
|
|
+ } else
|
|
|
+ rtt_writel(rtc, MR, mr & ~rtc->imr);
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int at91_rtc_resume(struct platform_device *pdev)
|
|
|
+{
|
|
|
+ struct sam9_rtc *rtc = platform_get_drvdata(pdev);
|
|
|
+ u32 mr;
|
|
|
+
|
|
|
+ if (rtc->imr) {
|
|
|
+ if (device_may_wakeup(&pdev->dev))
|
|
|
+ disable_irq_wake(AT91_ID_SYS);
|
|
|
+ mr = rtt_readl(rtc, MR);
|
|
|
+ rtt_writel(rtc, MR, mr | rtc->imr);
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+#else
|
|
|
+#define at91_rtc_suspend NULL
|
|
|
+#define at91_rtc_resume NULL
|
|
|
+#endif
|
|
|
+
|
|
|
+static struct platform_driver at91_rtc_driver = {
|
|
|
+ .driver.name = "rtc-at91sam9",
|
|
|
+ .driver.owner = THIS_MODULE,
|
|
|
+ .remove = __exit_p(at91_rtc_remove),
|
|
|
+ .shutdown = at91_rtc_shutdown,
|
|
|
+ .suspend = at91_rtc_suspend,
|
|
|
+ .resume = at91_rtc_resume,
|
|
|
+};
|
|
|
+
|
|
|
+/* Chips can have more than one RTT module, and they can be used for more
|
|
|
+ * than just RTCs. So we can't just register as "the" RTT driver.
|
|
|
+ *
|
|
|
+ * A normal approach in such cases is to create a library to allocate and
|
|
|
+ * free the modules. Here we just use bus_find_device() as like such a
|
|
|
+ * library, binding directly ... no runtime "library" footprint is needed.
|
|
|
+ */
|
|
|
+static int __init at91_rtc_match(struct device *dev, void *v)
|
|
|
+{
|
|
|
+ struct platform_device *pdev = to_platform_device(dev);
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ /* continue searching if this isn't the RTT we need */
|
|
|
+ if (strcmp("at91_rtt", pdev->name) != 0
|
|
|
+ || pdev->id != CONFIG_RTC_DRV_AT91SAM9_RTT)
|
|
|
+ goto fail;
|
|
|
+
|
|
|
+ /* else we found it ... but fail unless we can bind to the RTC driver */
|
|
|
+ if (dev->driver) {
|
|
|
+ dev_dbg(dev, "busy, can't use as RTC!\n");
|
|
|
+ goto fail;
|
|
|
+ }
|
|
|
+ dev->driver = &at91_rtc_driver.driver;
|
|
|
+ if (device_attach(dev) == 0) {
|
|
|
+ dev_dbg(dev, "can't attach RTC!\n");
|
|
|
+ goto fail;
|
|
|
+ }
|
|
|
+ ret = at91_rtc_probe(pdev);
|
|
|
+ if (ret == 0)
|
|
|
+ return true;
|
|
|
+
|
|
|
+ dev_dbg(dev, "RTC probe err %d!\n", ret);
|
|
|
+fail:
|
|
|
+ return false;
|
|
|
+}
|
|
|
+
|
|
|
+static int __init at91_rtc_init(void)
|
|
|
+{
|
|
|
+ int status;
|
|
|
+ struct device *rtc;
|
|
|
+
|
|
|
+ status = platform_driver_register(&at91_rtc_driver);
|
|
|
+ if (status)
|
|
|
+ return status;
|
|
|
+ rtc = bus_find_device(&platform_bus_type, NULL,
|
|
|
+ NULL, at91_rtc_match);
|
|
|
+ if (!rtc)
|
|
|
+ platform_driver_unregister(&at91_rtc_driver);
|
|
|
+ return rtc ? 0 : -ENODEV;
|
|
|
+}
|
|
|
+module_init(at91_rtc_init);
|
|
|
+
|
|
|
+static void __exit at91_rtc_exit(void)
|
|
|
+{
|
|
|
+ platform_driver_unregister(&at91_rtc_driver);
|
|
|
+}
|
|
|
+module_exit(at91_rtc_exit);
|
|
|
+
|
|
|
+
|
|
|
+MODULE_AUTHOR("Michel Benoit");
|
|
|
+MODULE_DESCRIPTION("RTC driver for Atmel AT91SAM9x");
|
|
|
+MODULE_LICENSE("GPL");
|