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@@ -49,7 +49,12 @@
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#define MX25_SDMA_BASE_ADDR 0x53fd4000
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#define MX25_USB_BASE_ADDR 0x53ff4000
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#define MX25_USB_OTG_BASE_ADDR (MX25_USB_BASE_ADDR + 0x0000)
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-#define MX25_USB_HS_BASE_ADDR (MX25_USB_BASE_ADDR + 0x0200)
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+/*
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+ * The reference manual (IMX25RM, Rev. 1, 06/2009) specifies an offset of 0x200
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+ * for the host controller. Early documentation drafts specified 0x400 and
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+ * Freescale internal sources confirm only the latter value to work.
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+ */
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+#define MX25_USB_HS_BASE_ADDR (MX25_USB_BASE_ADDR + 0x0400)
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#define MX25_CSI_BASE_ADDR 0x53ff8000
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#define MX25_IO_P2V(x) IMX_IO_P2V(x)
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