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@@ -796,18 +796,20 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
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if (encoder->encoder_type != DRM_MODE_ENCODER_DAC)
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pll_flags |= RADEON_PLL_NO_ODD_POST_DIV;
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if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS) {
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- struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
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- struct radeon_encoder_lvds *lvds = (struct radeon_encoder_lvds *)radeon_encoder->enc_priv;
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- if (lvds) {
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- if (lvds->use_bios_dividers) {
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- pll_ref_div = lvds->panel_ref_divider;
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- pll_fb_post_div = (lvds->panel_fb_divider |
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- (lvds->panel_post_divider << 16));
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- htotal_cntl = 0;
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- use_bios_divs = true;
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+ if (!rdev->is_atom_bios) {
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+ struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
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+ struct radeon_encoder_lvds *lvds = (struct radeon_encoder_lvds *)radeon_encoder->enc_priv;
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+ if (lvds) {
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+ if (lvds->use_bios_dividers) {
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+ pll_ref_div = lvds->panel_ref_divider;
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+ pll_fb_post_div = (lvds->panel_fb_divider |
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+ (lvds->panel_post_divider << 16));
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+ htotal_cntl = 0;
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+ use_bios_divs = true;
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+ }
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}
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+ pll_flags |= RADEON_PLL_USE_REF_DIV;
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}
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- pll_flags |= RADEON_PLL_USE_REF_DIV;
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}
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}
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}
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