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@@ -495,7 +495,7 @@ static unsigned long seg_base(struct x86_emulate_ctxt *ctxt,
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if (ctxt->mode == X86EMUL_MODE_PROT64 && seg < VCPU_SREG_FS)
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return 0;
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- return ops->get_cached_segment_base(seg, ctxt->vcpu);
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+ return ops->get_cached_segment_base(ctxt, seg);
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}
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static unsigned seg_override(struct x86_emulate_ctxt *ctxt,
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@@ -573,8 +573,8 @@ static int __linearize(struct x86_emulate_ctxt *ctxt,
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return emulate_gp(ctxt, 0);
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break;
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default:
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- usable = ctxt->ops->get_cached_descriptor(&desc, NULL, addr.seg,
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- ctxt->vcpu);
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+ usable = ctxt->ops->get_cached_descriptor(ctxt, &desc, NULL,
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+ addr.seg);
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if (!usable)
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goto bad;
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/* code segment or read-only data segment */
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@@ -597,7 +597,7 @@ static int __linearize(struct x86_emulate_ctxt *ctxt,
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goto bad;
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}
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cpl = ctxt->ops->cpl(ctxt->vcpu);
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- rpl = ctxt->ops->get_segment_selector(addr.seg, ctxt->vcpu) & 3;
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+ rpl = ctxt->ops->get_segment_selector(ctxt, addr.seg) & 3;
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cpl = max(cpl, rpl);
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if (!(desc.type & 8)) {
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/* data segment */
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@@ -1142,14 +1142,14 @@ static void get_descriptor_table_ptr(struct x86_emulate_ctxt *ctxt,
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if (selector & 1 << 2) {
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struct desc_struct desc;
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memset (dt, 0, sizeof *dt);
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- if (!ops->get_cached_descriptor(&desc, NULL, VCPU_SREG_LDTR,
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- ctxt->vcpu))
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+ if (!ops->get_cached_descriptor(ctxt, &desc, NULL,
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+ VCPU_SREG_LDTR))
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return;
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dt->size = desc_limit_scaled(&desc); /* what if limit > 65535? */
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dt->address = get_desc_base(&desc);
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} else
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- ops->get_gdt(dt, ctxt->vcpu);
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+ ops->get_gdt(ctxt, dt);
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}
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/* allowed just for 8 bytes segments */
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@@ -1304,8 +1304,8 @@ static int load_segment_descriptor(struct x86_emulate_ctxt *ctxt,
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return ret;
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}
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load:
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- ops->set_segment_selector(selector, seg, ctxt->vcpu);
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- ops->set_cached_descriptor(&seg_desc, 0, seg, ctxt->vcpu);
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+ ops->set_segment_selector(ctxt, selector, seg);
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+ ops->set_cached_descriptor(ctxt, &seg_desc, 0, seg);
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return X86EMUL_CONTINUE;
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exception:
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emulate_exception(ctxt, err_vec, err_code, true);
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@@ -1446,7 +1446,7 @@ static int emulate_push_sreg(struct x86_emulate_ctxt *ctxt,
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{
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struct decode_cache *c = &ctxt->decode;
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- c->src.val = ops->get_segment_selector(seg, ctxt->vcpu);
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+ c->src.val = ops->get_segment_selector(ctxt, seg);
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return em_push(ctxt);
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}
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@@ -1527,7 +1527,7 @@ int emulate_int_real(struct x86_emulate_ctxt *ctxt,
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ctxt->eflags &= ~(EFLG_IF | EFLG_TF | EFLG_AC);
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- c->src.val = ops->get_segment_selector(VCPU_SREG_CS, ctxt->vcpu);
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+ c->src.val = ops->get_segment_selector(ctxt, VCPU_SREG_CS);
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rc = em_push(ctxt);
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if (rc != X86EMUL_CONTINUE)
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return rc;
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@@ -1537,7 +1537,7 @@ int emulate_int_real(struct x86_emulate_ctxt *ctxt,
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if (rc != X86EMUL_CONTINUE)
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return rc;
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- ops->get_idt(&dt, ctxt->vcpu);
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+ ops->get_idt(ctxt, &dt);
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eip_addr = dt.address + (irq << 2);
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cs_addr = dt.address + (irq << 2) + 2;
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@@ -1814,7 +1814,7 @@ setup_syscalls_segments(struct x86_emulate_ctxt *ctxt,
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struct desc_struct *ss)
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{
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memset(cs, 0, sizeof(struct desc_struct));
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- ops->get_cached_descriptor(cs, NULL, VCPU_SREG_CS, ctxt->vcpu);
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+ ops->get_cached_descriptor(ctxt, cs, NULL, VCPU_SREG_CS);
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memset(ss, 0, sizeof(struct desc_struct));
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cs->l = 0; /* will be adjusted later */
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@@ -1861,10 +1861,10 @@ emulate_syscall(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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cs.d = 0;
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cs.l = 1;
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}
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- ops->set_cached_descriptor(&cs, 0, VCPU_SREG_CS, ctxt->vcpu);
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- ops->set_segment_selector(cs_sel, VCPU_SREG_CS, ctxt->vcpu);
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- ops->set_cached_descriptor(&ss, 0, VCPU_SREG_SS, ctxt->vcpu);
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- ops->set_segment_selector(ss_sel, VCPU_SREG_SS, ctxt->vcpu);
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+ ops->set_cached_descriptor(ctxt, &cs, 0, VCPU_SREG_CS);
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+ ops->set_segment_selector(ctxt, cs_sel, VCPU_SREG_CS);
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+ ops->set_cached_descriptor(ctxt, &ss, 0, VCPU_SREG_SS);
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+ ops->set_segment_selector(ctxt, ss_sel, VCPU_SREG_SS);
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c->regs[VCPU_REGS_RCX] = c->eip;
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if (is_long_mode(ctxt->vcpu)) {
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@@ -1933,10 +1933,10 @@ emulate_sysenter(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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cs.l = 1;
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}
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- ops->set_cached_descriptor(&cs, 0, VCPU_SREG_CS, ctxt->vcpu);
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- ops->set_segment_selector(cs_sel, VCPU_SREG_CS, ctxt->vcpu);
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- ops->set_cached_descriptor(&ss, 0, VCPU_SREG_SS, ctxt->vcpu);
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- ops->set_segment_selector(ss_sel, VCPU_SREG_SS, ctxt->vcpu);
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+ ops->set_cached_descriptor(ctxt, &cs, 0, VCPU_SREG_CS);
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+ ops->set_segment_selector(ctxt, cs_sel, VCPU_SREG_CS);
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+ ops->set_cached_descriptor(ctxt, &ss, 0, VCPU_SREG_SS);
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+ ops->set_segment_selector(ctxt, ss_sel, VCPU_SREG_SS);
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ops->get_msr(ctxt->vcpu, MSR_IA32_SYSENTER_EIP, &msr_data);
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c->eip = msr_data;
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@@ -1990,10 +1990,10 @@ emulate_sysexit(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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cs_sel |= SELECTOR_RPL_MASK;
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ss_sel |= SELECTOR_RPL_MASK;
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- ops->set_cached_descriptor(&cs, 0, VCPU_SREG_CS, ctxt->vcpu);
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- ops->set_segment_selector(cs_sel, VCPU_SREG_CS, ctxt->vcpu);
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- ops->set_cached_descriptor(&ss, 0, VCPU_SREG_SS, ctxt->vcpu);
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- ops->set_segment_selector(ss_sel, VCPU_SREG_SS, ctxt->vcpu);
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+ ops->set_cached_descriptor(ctxt, &cs, 0, VCPU_SREG_CS);
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+ ops->set_segment_selector(ctxt, cs_sel, VCPU_SREG_CS);
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+ ops->set_cached_descriptor(ctxt, &ss, 0, VCPU_SREG_SS);
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+ ops->set_segment_selector(ctxt, ss_sel, VCPU_SREG_SS);
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c->eip = c->regs[VCPU_REGS_RDX];
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c->regs[VCPU_REGS_RSP] = c->regs[VCPU_REGS_RCX];
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@@ -2024,7 +2024,7 @@ static bool emulator_io_port_access_allowed(struct x86_emulate_ctxt *ctxt,
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unsigned mask = (1 << len) - 1;
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unsigned long base;
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- ops->get_cached_descriptor(&tr_seg, &base3, VCPU_SREG_TR, ctxt->vcpu);
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+ ops->get_cached_descriptor(ctxt, &tr_seg, &base3, VCPU_SREG_TR);
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if (!tr_seg.p)
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return false;
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if (desc_limit_scaled(&tr_seg) < 103)
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@@ -2079,11 +2079,11 @@ static void save_state_to_tss16(struct x86_emulate_ctxt *ctxt,
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tss->si = c->regs[VCPU_REGS_RSI];
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tss->di = c->regs[VCPU_REGS_RDI];
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- tss->es = ops->get_segment_selector(VCPU_SREG_ES, ctxt->vcpu);
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- tss->cs = ops->get_segment_selector(VCPU_SREG_CS, ctxt->vcpu);
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- tss->ss = ops->get_segment_selector(VCPU_SREG_SS, ctxt->vcpu);
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- tss->ds = ops->get_segment_selector(VCPU_SREG_DS, ctxt->vcpu);
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- tss->ldt = ops->get_segment_selector(VCPU_SREG_LDTR, ctxt->vcpu);
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+ tss->es = ops->get_segment_selector(ctxt, VCPU_SREG_ES);
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+ tss->cs = ops->get_segment_selector(ctxt, VCPU_SREG_CS);
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+ tss->ss = ops->get_segment_selector(ctxt, VCPU_SREG_SS);
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+ tss->ds = ops->get_segment_selector(ctxt, VCPU_SREG_DS);
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+ tss->ldt = ops->get_segment_selector(ctxt, VCPU_SREG_LDTR);
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}
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static int load_state_from_tss16(struct x86_emulate_ctxt *ctxt,
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@@ -2108,11 +2108,11 @@ static int load_state_from_tss16(struct x86_emulate_ctxt *ctxt,
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* SDM says that segment selectors are loaded before segment
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* descriptors
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*/
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- ops->set_segment_selector(tss->ldt, VCPU_SREG_LDTR, ctxt->vcpu);
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- ops->set_segment_selector(tss->es, VCPU_SREG_ES, ctxt->vcpu);
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- ops->set_segment_selector(tss->cs, VCPU_SREG_CS, ctxt->vcpu);
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- ops->set_segment_selector(tss->ss, VCPU_SREG_SS, ctxt->vcpu);
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- ops->set_segment_selector(tss->ds, VCPU_SREG_DS, ctxt->vcpu);
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+ ops->set_segment_selector(ctxt, tss->ldt, VCPU_SREG_LDTR);
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+ ops->set_segment_selector(ctxt, tss->es, VCPU_SREG_ES);
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+ ops->set_segment_selector(ctxt, tss->cs, VCPU_SREG_CS);
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+ ops->set_segment_selector(ctxt, tss->ss, VCPU_SREG_SS);
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+ ops->set_segment_selector(ctxt, tss->ds, VCPU_SREG_DS);
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/*
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* Now load segment descriptors. If fault happenes at this stage
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@@ -2199,13 +2199,13 @@ static void save_state_to_tss32(struct x86_emulate_ctxt *ctxt,
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tss->esi = c->regs[VCPU_REGS_RSI];
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tss->edi = c->regs[VCPU_REGS_RDI];
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- tss->es = ops->get_segment_selector(VCPU_SREG_ES, ctxt->vcpu);
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- tss->cs = ops->get_segment_selector(VCPU_SREG_CS, ctxt->vcpu);
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- tss->ss = ops->get_segment_selector(VCPU_SREG_SS, ctxt->vcpu);
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- tss->ds = ops->get_segment_selector(VCPU_SREG_DS, ctxt->vcpu);
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- tss->fs = ops->get_segment_selector(VCPU_SREG_FS, ctxt->vcpu);
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- tss->gs = ops->get_segment_selector(VCPU_SREG_GS, ctxt->vcpu);
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- tss->ldt_selector = ops->get_segment_selector(VCPU_SREG_LDTR, ctxt->vcpu);
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+ tss->es = ops->get_segment_selector(ctxt, VCPU_SREG_ES);
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+ tss->cs = ops->get_segment_selector(ctxt, VCPU_SREG_CS);
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+ tss->ss = ops->get_segment_selector(ctxt, VCPU_SREG_SS);
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+ tss->ds = ops->get_segment_selector(ctxt, VCPU_SREG_DS);
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+ tss->fs = ops->get_segment_selector(ctxt, VCPU_SREG_FS);
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+ tss->gs = ops->get_segment_selector(ctxt, VCPU_SREG_GS);
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+ tss->ldt_selector = ops->get_segment_selector(ctxt, VCPU_SREG_LDTR);
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}
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static int load_state_from_tss32(struct x86_emulate_ctxt *ctxt,
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@@ -2232,13 +2232,13 @@ static int load_state_from_tss32(struct x86_emulate_ctxt *ctxt,
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* SDM says that segment selectors are loaded before segment
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* descriptors
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*/
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- ops->set_segment_selector(tss->ldt_selector, VCPU_SREG_LDTR, ctxt->vcpu);
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- ops->set_segment_selector(tss->es, VCPU_SREG_ES, ctxt->vcpu);
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- ops->set_segment_selector(tss->cs, VCPU_SREG_CS, ctxt->vcpu);
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- ops->set_segment_selector(tss->ss, VCPU_SREG_SS, ctxt->vcpu);
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- ops->set_segment_selector(tss->ds, VCPU_SREG_DS, ctxt->vcpu);
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- ops->set_segment_selector(tss->fs, VCPU_SREG_FS, ctxt->vcpu);
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- ops->set_segment_selector(tss->gs, VCPU_SREG_GS, ctxt->vcpu);
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+ ops->set_segment_selector(ctxt, tss->ldt_selector, VCPU_SREG_LDTR);
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+ ops->set_segment_selector(ctxt, tss->es, VCPU_SREG_ES);
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+ ops->set_segment_selector(ctxt, tss->cs, VCPU_SREG_CS);
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+ ops->set_segment_selector(ctxt, tss->ss, VCPU_SREG_SS);
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+ ops->set_segment_selector(ctxt, tss->ds, VCPU_SREG_DS);
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+ ops->set_segment_selector(ctxt, tss->fs, VCPU_SREG_FS);
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+ ops->set_segment_selector(ctxt, tss->gs, VCPU_SREG_GS);
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/*
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* Now load segment descriptors. If fault happenes at this stage
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@@ -2320,9 +2320,9 @@ static int emulator_do_task_switch(struct x86_emulate_ctxt *ctxt,
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{
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struct desc_struct curr_tss_desc, next_tss_desc;
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int ret;
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- u16 old_tss_sel = ops->get_segment_selector(VCPU_SREG_TR, ctxt->vcpu);
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+ u16 old_tss_sel = ops->get_segment_selector(ctxt, VCPU_SREG_TR);
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ulong old_tss_base =
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- ops->get_cached_segment_base(VCPU_SREG_TR, ctxt->vcpu);
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+ ops->get_cached_segment_base(ctxt, VCPU_SREG_TR);
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u32 desc_limit;
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/* FIXME: old_tss_base == ~0 ? */
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@@ -2383,8 +2383,8 @@ static int emulator_do_task_switch(struct x86_emulate_ctxt *ctxt,
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}
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ops->set_cr(0, ops->get_cr(0, ctxt->vcpu) | X86_CR0_TS, ctxt->vcpu);
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- ops->set_cached_descriptor(&next_tss_desc, 0, VCPU_SREG_TR, ctxt->vcpu);
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- ops->set_segment_selector(tss_selector, VCPU_SREG_TR, ctxt->vcpu);
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+ ops->set_cached_descriptor(ctxt, &next_tss_desc, 0, VCPU_SREG_TR);
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+ ops->set_segment_selector(ctxt, tss_selector, VCPU_SREG_TR);
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if (has_error_code) {
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struct decode_cache *c = &ctxt->decode;
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@@ -2475,7 +2475,7 @@ static int em_call_far(struct x86_emulate_ctxt *ctxt)
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ulong old_eip;
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int rc;
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- old_cs = ctxt->ops->get_segment_selector(VCPU_SREG_CS, ctxt->vcpu);
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+ old_cs = ctxt->ops->get_segment_selector(ctxt, VCPU_SREG_CS);
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old_eip = c->eip;
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memcpy(&sel, c->src.valptr + c->op_bytes, 2);
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@@ -3743,7 +3743,7 @@ special_insn:
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rc = emulate_ud(ctxt);
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goto done;
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}
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- c->dst.val = ops->get_segment_selector(c->modrm_reg, ctxt->vcpu);
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+ c->dst.val = ops->get_segment_selector(ctxt, c->modrm_reg);
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break;
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case 0x8d: /* lea r16/r32, m */
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c->dst.val = c->src.addr.mem.ea;
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