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@@ -1303,8 +1303,11 @@ static void qlcnic_83xx_dump_pause_control_regs(struct qlcnic_adapter *adapter)
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{
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int i, j;
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u32 val = 0, val1 = 0, reg = 0;
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+ int err = 0;
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- val = QLCRD32(adapter, QLC_83XX_SRE_SHIM_REG);
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+ val = QLCRD32(adapter, QLC_83XX_SRE_SHIM_REG, &err);
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+ if (err == -EIO)
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+ return;
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dev_info(&adapter->pdev->dev, "SRE-Shim Ctrl:0x%x\n", val);
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for (j = 0; j < 2; j++) {
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@@ -1318,7 +1321,9 @@ static void qlcnic_83xx_dump_pause_control_regs(struct qlcnic_adapter *adapter)
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reg = QLC_83XX_PORT1_THRESHOLD;
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}
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for (i = 0; i < 8; i++) {
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- val = QLCRD32(adapter, reg + (i * 0x4));
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+ val = QLCRD32(adapter, reg + (i * 0x4), &err);
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+ if (err == -EIO)
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+ return;
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dev_info(&adapter->pdev->dev, "0x%x ", val);
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}
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dev_info(&adapter->pdev->dev, "\n");
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@@ -1335,8 +1340,10 @@ static void qlcnic_83xx_dump_pause_control_regs(struct qlcnic_adapter *adapter)
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reg = QLC_83XX_PORT1_TC_MC_REG;
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}
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for (i = 0; i < 4; i++) {
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- val = QLCRD32(adapter, reg + (i * 0x4));
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- dev_info(&adapter->pdev->dev, "0x%x ", val);
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+ val = QLCRD32(adapter, reg + (i * 0x4), &err);
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+ if (err == -EIO)
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+ return;
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+ dev_info(&adapter->pdev->dev, "0x%x ", val);
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}
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dev_info(&adapter->pdev->dev, "\n");
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}
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@@ -1352,17 +1359,25 @@ static void qlcnic_83xx_dump_pause_control_regs(struct qlcnic_adapter *adapter)
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reg = QLC_83XX_PORT1_TC_STATS;
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}
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for (i = 7; i >= 0; i--) {
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- val = QLCRD32(adapter, reg);
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+ val = QLCRD32(adapter, reg, &err);
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+ if (err == -EIO)
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+ return;
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val &= ~(0x7 << 29); /* Reset bits 29 to 31 */
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QLCWR32(adapter, reg, (val | (i << 29)));
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- val = QLCRD32(adapter, reg);
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+ val = QLCRD32(adapter, reg, &err);
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+ if (err == -EIO)
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+ return;
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dev_info(&adapter->pdev->dev, "0x%x ", val);
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}
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dev_info(&adapter->pdev->dev, "\n");
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}
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- val = QLCRD32(adapter, QLC_83XX_PORT2_IFB_THRESHOLD);
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- val1 = QLCRD32(adapter, QLC_83XX_PORT3_IFB_THRESHOLD);
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+ val = QLCRD32(adapter, QLC_83XX_PORT2_IFB_THRESHOLD, &err);
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+ if (err == -EIO)
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+ return;
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+ val1 = QLCRD32(adapter, QLC_83XX_PORT3_IFB_THRESHOLD, &err);
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+ if (err == -EIO)
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+ return;
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dev_info(&adapter->pdev->dev,
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"IFB-Pause Thresholds: Port 2:0x%x, Port 3:0x%x\n",
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val, val1);
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@@ -1425,7 +1440,7 @@ static void qlcnic_83xx_take_eport_out_of_reset(struct qlcnic_adapter *adapter)
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static int qlcnic_83xx_check_heartbeat(struct qlcnic_adapter *p_dev)
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{
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u32 heartbeat, peg_status;
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- int retries, ret = -EIO;
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+ int retries, ret = -EIO, err = 0;
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retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT;
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p_dev->heartbeat = QLC_SHARED_REG_RD32(p_dev,
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@@ -1453,11 +1468,11 @@ static int qlcnic_83xx_check_heartbeat(struct qlcnic_adapter *p_dev)
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"PEG_NET_2_PC: 0x%x, PEG_NET_3_PC: 0x%x,\n"
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"PEG_NET_4_PC: 0x%x\n", peg_status,
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QLC_SHARED_REG_RD32(p_dev, QLCNIC_PEG_HALT_STATUS2),
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- QLCRD32(p_dev, QLC_83XX_CRB_PEG_NET_0),
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- QLCRD32(p_dev, QLC_83XX_CRB_PEG_NET_1),
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- QLCRD32(p_dev, QLC_83XX_CRB_PEG_NET_2),
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- QLCRD32(p_dev, QLC_83XX_CRB_PEG_NET_3),
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- QLCRD32(p_dev, QLC_83XX_CRB_PEG_NET_4));
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+ QLCRD32(p_dev, QLC_83XX_CRB_PEG_NET_0, &err),
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+ QLCRD32(p_dev, QLC_83XX_CRB_PEG_NET_1, &err),
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+ QLCRD32(p_dev, QLC_83XX_CRB_PEG_NET_2, &err),
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+ QLCRD32(p_dev, QLC_83XX_CRB_PEG_NET_3, &err),
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+ QLCRD32(p_dev, QLC_83XX_CRB_PEG_NET_4, &err));
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if (QLCNIC_FWERROR_CODE(peg_status) == 0x67)
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dev_err(&p_dev->pdev->dev,
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@@ -1501,18 +1516,22 @@ int qlcnic_83xx_check_hw_status(struct qlcnic_adapter *p_dev)
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static int qlcnic_83xx_poll_reg(struct qlcnic_adapter *p_dev, u32 addr,
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int duration, u32 mask, u32 status)
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{
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+ int timeout_error, err = 0;
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u32 value;
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- int timeout_error;
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u8 retries;
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- value = qlcnic_83xx_rd_reg_indirect(p_dev, addr);
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+ value = QLCRD32(p_dev, addr, &err);
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+ if (err == -EIO)
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+ return err;
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retries = duration / 10;
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do {
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if ((value & mask) != status) {
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timeout_error = 1;
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msleep(duration / 10);
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- value = qlcnic_83xx_rd_reg_indirect(p_dev, addr);
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+ value = QLCRD32(p_dev, addr, &err);
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+ if (err == -EIO)
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+ return err;
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} else {
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timeout_error = 0;
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break;
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@@ -1606,9 +1625,12 @@ int qlcnic_83xx_get_reset_instruction_template(struct qlcnic_adapter *p_dev)
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static void qlcnic_83xx_read_write_crb_reg(struct qlcnic_adapter *p_dev,
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u32 raddr, u32 waddr)
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{
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- int value;
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+ int err = 0;
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+ u32 value;
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- value = qlcnic_83xx_rd_reg_indirect(p_dev, raddr);
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+ value = QLCRD32(p_dev, raddr, &err);
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+ if (err == -EIO)
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+ return;
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qlcnic_83xx_wrt_reg_indirect(p_dev, waddr, value);
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}
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@@ -1617,12 +1639,16 @@ static void qlcnic_83xx_rmw_crb_reg(struct qlcnic_adapter *p_dev,
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u32 raddr, u32 waddr,
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struct qlc_83xx_rmw *p_rmw_hdr)
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{
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- int value;
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+ int err = 0;
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+ u32 value;
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- if (p_rmw_hdr->index_a)
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+ if (p_rmw_hdr->index_a) {
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value = p_dev->ahw->reset.array[p_rmw_hdr->index_a];
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- else
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- value = qlcnic_83xx_rd_reg_indirect(p_dev, raddr);
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+ } else {
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+ value = QLCRD32(p_dev, raddr, &err);
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+ if (err == -EIO)
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+ return;
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+ }
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value &= p_rmw_hdr->mask;
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value <<= p_rmw_hdr->shl;
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@@ -1675,7 +1701,7 @@ static void qlcnic_83xx_poll_list(struct qlcnic_adapter *p_dev,
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long delay;
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struct qlc_83xx_entry *entry;
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struct qlc_83xx_poll *poll;
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- int i;
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+ int i, err = 0;
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unsigned long arg1, arg2;
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poll = (struct qlc_83xx_poll *)((char *)p_hdr +
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@@ -1699,10 +1725,12 @@ static void qlcnic_83xx_poll_list(struct qlcnic_adapter *p_dev,
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arg1, delay,
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poll->mask,
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poll->status)){
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- qlcnic_83xx_rd_reg_indirect(p_dev,
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- arg1);
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- qlcnic_83xx_rd_reg_indirect(p_dev,
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- arg2);
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+ QLCRD32(p_dev, arg1, &err);
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+ if (err == -EIO)
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+ return;
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+ QLCRD32(p_dev, arg2, &err);
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+ if (err == -EIO)
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+ return;
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}
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}
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}
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@@ -1768,7 +1796,7 @@ static void qlcnic_83xx_poll_read_list(struct qlcnic_adapter *p_dev,
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struct qlc_83xx_entry_hdr *p_hdr)
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{
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long delay;
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- int index, i, j;
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+ int index, i, j, err;
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struct qlc_83xx_quad_entry *entry;
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struct qlc_83xx_poll *poll;
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unsigned long addr;
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@@ -1788,7 +1816,10 @@ static void qlcnic_83xx_poll_read_list(struct qlcnic_adapter *p_dev,
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poll->mask, poll->status)){
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index = p_dev->ahw->reset.array_index;
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addr = entry->dr_addr;
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- j = qlcnic_83xx_rd_reg_indirect(p_dev, addr);
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+ j = QLCRD32(p_dev, addr, &err);
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+ if (err == -EIO)
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+ return;
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+
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p_dev->ahw->reset.array[index++] = j;
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if (index == QLC_83XX_MAX_RESET_SEQ_ENTRIES)
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