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@@ -49,10 +49,6 @@
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* issues and should be optimal for the uncontended case. Note the tail must be
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* in the high part, because a wide xadd increment of the low part would carry
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* up and contaminate the high part.
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- *
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- * With fewer than 2^8 possible CPUs, we can use x86's partial registers to
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- * save some instructions and make the code more elegant. There really isn't
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- * much between them in performance though, especially as locks are out of line.
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*/
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static __always_inline void __ticket_spin_lock(arch_spinlock_t *lock)
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{
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