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@@ -74,17 +74,18 @@ void mxc_iomux_set_pad(enum iomux_pins pin, u32 config)
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u32 field, l;
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u32 field, l;
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void __iomem *reg;
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void __iomem *reg;
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- reg = IOMUXSW_PAD_CTL + (pin + 2) / 3;
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+ pin &= IOMUX_PADNUM_MASK;
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+ reg = IOMUXSW_PAD_CTL + (pin + 2) / 3 * 4;
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field = (pin + 2) % 3;
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field = (pin + 2) % 3;
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- pr_debug("%s: reg offset = 0x%x field = %d\n",
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+ pr_debug("%s: reg offset = 0x%x, field = %d\n",
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__func__, (pin + 2) / 3, field);
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__func__, (pin + 2) / 3, field);
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spin_lock(&gpio_mux_lock);
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spin_lock(&gpio_mux_lock);
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l = __raw_readl(reg);
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l = __raw_readl(reg);
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- l &= ~(0x1ff << (field * 9));
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- l |= config << (field * 9);
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+ l &= ~(0x1ff << (field * 10));
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+ l |= config << (field * 10);
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__raw_writel(l, reg);
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__raw_writel(l, reg);
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spin_unlock(&gpio_mux_lock);
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spin_unlock(&gpio_mux_lock);
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