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@@ -494,7 +494,7 @@ static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
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{
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u32 rxctrl;
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int cpu = get_cpu();
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- int q = rx_ring - adapter->rx_ring;
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+ int q = rx_ring->reg_idx;
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if (rx_ring->cpu != cpu) {
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rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
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@@ -522,7 +522,7 @@ static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
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{
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u32 txctrl;
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int cpu = get_cpu();
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- int q = tx_ring - adapter->tx_ring;
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+ int q = tx_ring->reg_idx;
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struct ixgbe_hw *hw = &adapter->hw;
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if (tx_ring->cpu != cpu) {
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@@ -556,12 +556,12 @@ static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
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for (i = 0; i < adapter->num_tx_queues; i++) {
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- adapter->tx_ring[i].cpu = -1;
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- ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
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+ adapter->tx_ring[i]->cpu = -1;
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+ ixgbe_update_tx_dca(adapter, adapter->tx_ring[i]);
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}
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for (i = 0; i < adapter->num_rx_queues; i++) {
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- adapter->rx_ring[i].cpu = -1;
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- ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
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+ adapter->rx_ring[i]->cpu = -1;
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+ ixgbe_update_rx_dca(adapter, adapter->rx_ring[i]);
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}
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}
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@@ -1032,7 +1032,7 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
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adapter->num_rx_queues);
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for (i = 0; i < q_vector->rxr_count; i++) {
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- j = adapter->rx_ring[r_idx].reg_idx;
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+ j = adapter->rx_ring[r_idx]->reg_idx;
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ixgbe_set_ivar(adapter, 0, j, v_idx);
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r_idx = find_next_bit(q_vector->rxr_idx,
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adapter->num_rx_queues,
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@@ -1042,7 +1042,7 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
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adapter->num_tx_queues);
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for (i = 0; i < q_vector->txr_count; i++) {
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- j = adapter->tx_ring[r_idx].reg_idx;
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+ j = adapter->tx_ring[r_idx]->reg_idx;
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ixgbe_set_ivar(adapter, 1, j, v_idx);
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r_idx = find_next_bit(q_vector->txr_idx,
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adapter->num_tx_queues,
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@@ -1182,7 +1182,7 @@ static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
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r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
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for (i = 0; i < q_vector->txr_count; i++) {
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- tx_ring = &(adapter->tx_ring[r_idx]);
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+ tx_ring = adapter->tx_ring[r_idx];
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ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
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q_vector->tx_itr,
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tx_ring->total_packets,
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@@ -1197,7 +1197,7 @@ static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
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r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
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for (i = 0; i < q_vector->rxr_count; i++) {
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- rx_ring = &(adapter->rx_ring[r_idx]);
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+ rx_ring = adapter->rx_ring[r_idx];
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ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
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q_vector->rx_itr,
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rx_ring->total_packets,
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@@ -1319,7 +1319,7 @@ static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
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netif_tx_stop_all_queues(netdev);
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for (i = 0; i < adapter->num_tx_queues; i++) {
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struct ixgbe_ring *tx_ring =
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- &adapter->tx_ring[i];
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+ adapter->tx_ring[i];
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if (test_and_clear_bit(__IXGBE_FDIR_INIT_DONE,
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&tx_ring->reinit_state))
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schedule_work(&adapter->fdir_reinit_task);
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@@ -1378,7 +1378,7 @@ static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
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r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
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for (i = 0; i < q_vector->txr_count; i++) {
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- tx_ring = &(adapter->tx_ring[r_idx]);
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+ tx_ring = adapter->tx_ring[r_idx];
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tx_ring->total_bytes = 0;
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tx_ring->total_packets = 0;
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r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
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@@ -1406,7 +1406,7 @@ static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
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r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
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for (i = 0; i < q_vector->rxr_count; i++) {
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- rx_ring = &(adapter->rx_ring[r_idx]);
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+ rx_ring = adapter->rx_ring[r_idx];
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rx_ring->total_bytes = 0;
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rx_ring->total_packets = 0;
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r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
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@@ -1436,7 +1436,7 @@ static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
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r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
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for (i = 0; i < q_vector->txr_count; i++) {
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- ring = &(adapter->tx_ring[r_idx]);
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+ ring = adapter->tx_ring[r_idx];
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ring->total_bytes = 0;
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ring->total_packets = 0;
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r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
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@@ -1445,7 +1445,7 @@ static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
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r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
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for (i = 0; i < q_vector->rxr_count; i++) {
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- ring = &(adapter->rx_ring[r_idx]);
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+ ring = adapter->rx_ring[r_idx];
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ring->total_bytes = 0;
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ring->total_packets = 0;
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r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
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@@ -1476,7 +1476,7 @@ static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
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long r_idx;
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r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
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- rx_ring = &(adapter->rx_ring[r_idx]);
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+ rx_ring = adapter->rx_ring[r_idx];
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#ifdef CONFIG_IXGBE_DCA
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if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
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ixgbe_update_rx_dca(adapter, rx_ring);
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@@ -1517,7 +1517,7 @@ static int ixgbe_clean_rxtx_many(struct napi_struct *napi, int budget)
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r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
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for (i = 0; i < q_vector->txr_count; i++) {
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- ring = &(adapter->tx_ring[r_idx]);
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+ ring = adapter->tx_ring[r_idx];
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#ifdef CONFIG_IXGBE_DCA
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if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
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ixgbe_update_tx_dca(adapter, ring);
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@@ -1533,7 +1533,7 @@ static int ixgbe_clean_rxtx_many(struct napi_struct *napi, int budget)
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budget = max(budget, 1);
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r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
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for (i = 0; i < q_vector->rxr_count; i++) {
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- ring = &(adapter->rx_ring[r_idx]);
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+ ring = adapter->rx_ring[r_idx];
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#ifdef CONFIG_IXGBE_DCA
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if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
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ixgbe_update_rx_dca(adapter, ring);
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@@ -1544,7 +1544,7 @@ static int ixgbe_clean_rxtx_many(struct napi_struct *napi, int budget)
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}
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r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
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- ring = &(adapter->rx_ring[r_idx]);
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+ ring = adapter->rx_ring[r_idx];
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/* If all Rx work done, exit the polling mode */
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if (work_done < budget) {
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napi_complete(napi);
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@@ -1577,7 +1577,7 @@ static int ixgbe_clean_txonly(struct napi_struct *napi, int budget)
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long r_idx;
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r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
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- tx_ring = &(adapter->tx_ring[r_idx]);
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+ tx_ring = adapter->tx_ring[r_idx];
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#ifdef CONFIG_IXGBE_DCA
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if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
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ixgbe_update_tx_dca(adapter, tx_ring);
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@@ -1762,8 +1762,8 @@ static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
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struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
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u8 current_itr;
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u32 new_itr = q_vector->eitr;
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- struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
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- struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
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+ struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
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+ struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
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q_vector->tx_itr = ixgbe_update_itr(adapter, new_itr,
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q_vector->tx_itr,
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@@ -1875,10 +1875,10 @@ static irqreturn_t ixgbe_intr(int irq, void *data)
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ixgbe_check_fan_failure(adapter, eicr);
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if (napi_schedule_prep(&(q_vector->napi))) {
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- adapter->tx_ring[0].total_packets = 0;
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- adapter->tx_ring[0].total_bytes = 0;
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- adapter->rx_ring[0].total_packets = 0;
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- adapter->rx_ring[0].total_bytes = 0;
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+ adapter->tx_ring[0]->total_packets = 0;
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+ adapter->tx_ring[0]->total_bytes = 0;
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+ adapter->rx_ring[0]->total_packets = 0;
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+ adapter->rx_ring[0]->total_bytes = 0;
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/* would disable interrupts here but EIAM disabled it */
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__napi_schedule(&(q_vector->napi));
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}
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@@ -2010,7 +2010,7 @@ static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
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/* Setup the HW Tx Head and Tail descriptor pointers */
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for (i = 0; i < adapter->num_tx_queues; i++) {
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- struct ixgbe_ring *ring = &adapter->tx_ring[i];
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+ struct ixgbe_ring *ring = adapter->tx_ring[i];
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j = ring->reg_idx;
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tdba = ring->dma;
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tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
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@@ -2020,8 +2020,8 @@ static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
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IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
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IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
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IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
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- adapter->tx_ring[i].head = IXGBE_TDH(j);
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- adapter->tx_ring[i].tail = IXGBE_TDT(j);
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+ adapter->tx_ring[i]->head = IXGBE_TDH(j);
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+ adapter->tx_ring[i]->tail = IXGBE_TDT(j);
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/*
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* Disable Tx Head Writeback RO bit, since this hoses
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* bookkeeping if things aren't delivered in order.
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@@ -2168,7 +2168,7 @@ static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter, int index)
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u32 rscctrl;
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int rx_buf_len;
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- rx_ring = &adapter->rx_ring[index];
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+ rx_ring = adapter->rx_ring[index];
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j = rx_ring->reg_idx;
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rx_buf_len = rx_ring->rx_buf_len;
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rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(j));
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@@ -2266,7 +2266,7 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
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#endif
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IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
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- rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
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+ rdlen = adapter->rx_ring[0]->count * sizeof(union ixgbe_adv_rx_desc);
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/* disable receives while setting up the descriptors */
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rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
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IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
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@@ -2276,7 +2276,7 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
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* the Base and Length of the Rx Descriptor Ring
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*/
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for (i = 0; i < adapter->num_rx_queues; i++) {
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- rx_ring = &adapter->rx_ring[i];
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+ rx_ring = adapter->rx_ring[i];
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rdba = rx_ring->dma;
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j = rx_ring->reg_idx;
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IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_BIT_MASK(32)));
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@@ -2483,7 +2483,7 @@ static void ixgbe_vlan_rx_register(struct net_device *netdev,
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} else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
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for (i = 0; i < adapter->num_rx_queues; i++) {
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u32 ctrl;
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- j = adapter->rx_ring[i].reg_idx;
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+ j = adapter->rx_ring[i]->reg_idx;
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ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXDCTL(j));
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ctrl |= IXGBE_RXDCTL_VME;
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXDCTL(j), ctrl);
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@@ -2646,7 +2646,7 @@ static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
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ixgbe_dcb_hw_config(&adapter->hw, &adapter->dcb_cfg);
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for (i = 0; i < adapter->num_tx_queues; i++) {
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- j = adapter->tx_ring[i].reg_idx;
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+ j = adapter->tx_ring[i]->reg_idx;
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txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
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/* PThresh workaround for Tx hang with DFP enabled. */
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txdctl |= 32;
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@@ -2663,7 +2663,7 @@ static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
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vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
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IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
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for (i = 0; i < adapter->num_rx_queues; i++) {
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- j = adapter->rx_ring[i].reg_idx;
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+ j = adapter->rx_ring[i]->reg_idx;
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vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
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vlnctrl |= IXGBE_RXDCTL_VME;
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IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
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@@ -2703,7 +2703,7 @@ static void ixgbe_configure(struct ixgbe_adapter *adapter)
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#endif /* IXGBE_FCOE */
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if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
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for (i = 0; i < adapter->num_tx_queues; i++)
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- adapter->tx_ring[i].atr_sample_rate =
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+ adapter->tx_ring[i]->atr_sample_rate =
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adapter->atr_sample_rate;
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ixgbe_init_fdir_signature_82599(hw, adapter->fdir_pballoc);
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} else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
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@@ -2713,8 +2713,8 @@ static void ixgbe_configure(struct ixgbe_adapter *adapter)
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ixgbe_configure_tx(adapter);
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ixgbe_configure_rx(adapter);
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for (i = 0; i < adapter->num_rx_queues; i++)
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- ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
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- (adapter->rx_ring[i].count - 1));
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+ ixgbe_alloc_rx_buffers(adapter, adapter->rx_ring[i],
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+ (adapter->rx_ring[i]->count - 1));
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}
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static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
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@@ -2797,7 +2797,7 @@ link_cfg_out:
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static inline void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
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int rxr)
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{
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- int j = adapter->rx_ring[rxr].reg_idx;
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+ int j = adapter->rx_ring[rxr]->reg_idx;
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int k;
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for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
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@@ -2811,8 +2811,8 @@ static inline void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
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DPRINTK(DRV, ERR, "RXDCTL.ENABLE on Rx queue %d "
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"not set within the polling period\n", rxr);
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}
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- ixgbe_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
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- (adapter->rx_ring[rxr].count - 1));
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+ ixgbe_release_rx_desc(&adapter->hw, adapter->rx_ring[rxr],
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+ (adapter->rx_ring[rxr]->count - 1));
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}
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static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
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@@ -2899,7 +2899,7 @@ static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
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}
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for (i = 0; i < adapter->num_tx_queues; i++) {
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- j = adapter->tx_ring[i].reg_idx;
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+ j = adapter->tx_ring[i]->reg_idx;
|
|
|
txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
|
|
|
/* enable WTHRESH=8 descriptors, to encourage burst writeback */
|
|
|
txdctl |= (8 << 16);
|
|
@@ -2913,7 +2913,7 @@ static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
|
|
|
}
|
|
|
for (i = 0; i < adapter->num_tx_queues; i++) {
|
|
|
- j = adapter->tx_ring[i].reg_idx;
|
|
|
+ j = adapter->tx_ring[i]->reg_idx;
|
|
|
txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
|
|
|
txdctl |= IXGBE_TXDCTL_ENABLE;
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
|
|
@@ -2932,7 +2932,7 @@ static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
|
|
|
}
|
|
|
|
|
|
for (i = 0; i < num_rx_rings; i++) {
|
|
|
- j = adapter->rx_ring[i].reg_idx;
|
|
|
+ j = adapter->rx_ring[i]->reg_idx;
|
|
|
rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
|
|
|
/* enable PTHRESH=32 descriptors (half the internal cache)
|
|
|
* and HTHRESH=0 descriptors (to minimize latency on fetch),
|
|
@@ -3006,7 +3006,7 @@ static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
|
|
|
|
|
|
for (i = 0; i < adapter->num_tx_queues; i++)
|
|
|
set_bit(__IXGBE_FDIR_INIT_DONE,
|
|
|
- &(adapter->tx_ring[i].reinit_state));
|
|
|
+ &(adapter->tx_ring[i]->reinit_state));
|
|
|
|
|
|
/* enable transmits */
|
|
|
netif_tx_start_all_queues(netdev);
|
|
@@ -3177,7 +3177,7 @@ static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
|
|
|
int i;
|
|
|
|
|
|
for (i = 0; i < adapter->num_rx_queues; i++)
|
|
|
- ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
|
|
|
+ ixgbe_clean_rx_ring(adapter, adapter->rx_ring[i]);
|
|
|
}
|
|
|
|
|
|
/**
|
|
@@ -3189,7 +3189,7 @@ static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
|
|
|
int i;
|
|
|
|
|
|
for (i = 0; i < adapter->num_tx_queues; i++)
|
|
|
- ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
|
|
|
+ ixgbe_clean_tx_ring(adapter, adapter->tx_ring[i]);
|
|
|
}
|
|
|
|
|
|
void ixgbe_down(struct ixgbe_adapter *adapter)
|
|
@@ -3240,7 +3240,7 @@ void ixgbe_down(struct ixgbe_adapter *adapter)
|
|
|
|
|
|
/* disable transmits in the hardware now that interrupts are off */
|
|
|
for (i = 0; i < adapter->num_tx_queues; i++) {
|
|
|
- j = adapter->tx_ring[i].reg_idx;
|
|
|
+ j = adapter->tx_ring[i]->reg_idx;
|
|
|
txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j),
|
|
|
(txdctl & ~IXGBE_TXDCTL_ENABLE));
|
|
@@ -3280,13 +3280,13 @@ static int ixgbe_poll(struct napi_struct *napi, int budget)
|
|
|
|
|
|
#ifdef CONFIG_IXGBE_DCA
|
|
|
if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
|
|
|
- ixgbe_update_tx_dca(adapter, adapter->tx_ring);
|
|
|
- ixgbe_update_rx_dca(adapter, adapter->rx_ring);
|
|
|
+ ixgbe_update_tx_dca(adapter, adapter->tx_ring[0]);
|
|
|
+ ixgbe_update_rx_dca(adapter, adapter->rx_ring[0]);
|
|
|
}
|
|
|
#endif
|
|
|
|
|
|
- tx_clean_complete = ixgbe_clean_tx_irq(q_vector, adapter->tx_ring);
|
|
|
- ixgbe_clean_rx_irq(q_vector, adapter->rx_ring, &work_done, budget);
|
|
|
+ tx_clean_complete = ixgbe_clean_tx_irq(q_vector, adapter->tx_ring[0]);
|
|
|
+ ixgbe_clean_rx_irq(q_vector, adapter->rx_ring[0], &work_done, budget);
|
|
|
|
|
|
if (!tx_clean_complete)
|
|
|
work_done = budget;
|
|
@@ -3574,9 +3574,9 @@ static inline bool ixgbe_cache_ring_rss(struct ixgbe_adapter *adapter)
|
|
|
|
|
|
if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
|
|
|
for (i = 0; i < adapter->num_rx_queues; i++)
|
|
|
- adapter->rx_ring[i].reg_idx = i;
|
|
|
+ adapter->rx_ring[i]->reg_idx = i;
|
|
|
for (i = 0; i < adapter->num_tx_queues; i++)
|
|
|
- adapter->tx_ring[i].reg_idx = i;
|
|
|
+ adapter->tx_ring[i]->reg_idx = i;
|
|
|
ret = true;
|
|
|
} else {
|
|
|
ret = false;
|
|
@@ -3603,8 +3603,8 @@ static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter *adapter)
|
|
|
if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
|
|
|
/* the number of queues is assumed to be symmetric */
|
|
|
for (i = 0; i < dcb_i; i++) {
|
|
|
- adapter->rx_ring[i].reg_idx = i << 3;
|
|
|
- adapter->tx_ring[i].reg_idx = i << 2;
|
|
|
+ adapter->rx_ring[i]->reg_idx = i << 3;
|
|
|
+ adapter->tx_ring[i]->reg_idx = i << 2;
|
|
|
}
|
|
|
ret = true;
|
|
|
} else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
|
|
@@ -3622,18 +3622,18 @@ static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter *adapter)
|
|
|
* Rx TC0-TC7 are offset by 16 queues each
|
|
|
*/
|
|
|
for (i = 0; i < 3; i++) {
|
|
|
- adapter->tx_ring[i].reg_idx = i << 5;
|
|
|
- adapter->rx_ring[i].reg_idx = i << 4;
|
|
|
+ adapter->tx_ring[i]->reg_idx = i << 5;
|
|
|
+ adapter->rx_ring[i]->reg_idx = i << 4;
|
|
|
}
|
|
|
for ( ; i < 5; i++) {
|
|
|
- adapter->tx_ring[i].reg_idx =
|
|
|
+ adapter->tx_ring[i]->reg_idx =
|
|
|
((i + 2) << 4);
|
|
|
- adapter->rx_ring[i].reg_idx = i << 4;
|
|
|
+ adapter->rx_ring[i]->reg_idx = i << 4;
|
|
|
}
|
|
|
for ( ; i < dcb_i; i++) {
|
|
|
- adapter->tx_ring[i].reg_idx =
|
|
|
+ adapter->tx_ring[i]->reg_idx =
|
|
|
((i + 8) << 3);
|
|
|
- adapter->rx_ring[i].reg_idx = i << 4;
|
|
|
+ adapter->rx_ring[i]->reg_idx = i << 4;
|
|
|
}
|
|
|
|
|
|
ret = true;
|
|
@@ -3646,12 +3646,12 @@ static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter *adapter)
|
|
|
*
|
|
|
* Rx TC0-TC3 are offset by 32 queues each
|
|
|
*/
|
|
|
- adapter->tx_ring[0].reg_idx = 0;
|
|
|
- adapter->tx_ring[1].reg_idx = 64;
|
|
|
- adapter->tx_ring[2].reg_idx = 96;
|
|
|
- adapter->tx_ring[3].reg_idx = 112;
|
|
|
+ adapter->tx_ring[0]->reg_idx = 0;
|
|
|
+ adapter->tx_ring[1]->reg_idx = 64;
|
|
|
+ adapter->tx_ring[2]->reg_idx = 96;
|
|
|
+ adapter->tx_ring[3]->reg_idx = 112;
|
|
|
for (i = 0 ; i < dcb_i; i++)
|
|
|
- adapter->rx_ring[i].reg_idx = i << 5;
|
|
|
+ adapter->rx_ring[i]->reg_idx = i << 5;
|
|
|
|
|
|
ret = true;
|
|
|
} else {
|
|
@@ -3684,9 +3684,9 @@ static bool inline ixgbe_cache_ring_fdir(struct ixgbe_adapter *adapter)
|
|
|
((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) ||
|
|
|
(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))) {
|
|
|
for (i = 0; i < adapter->num_rx_queues; i++)
|
|
|
- adapter->rx_ring[i].reg_idx = i;
|
|
|
+ adapter->rx_ring[i]->reg_idx = i;
|
|
|
for (i = 0; i < adapter->num_tx_queues; i++)
|
|
|
- adapter->tx_ring[i].reg_idx = i;
|
|
|
+ adapter->tx_ring[i]->reg_idx = i;
|
|
|
ret = true;
|
|
|
}
|
|
|
|
|
@@ -3714,8 +3714,8 @@ static inline bool ixgbe_cache_ring_fcoe(struct ixgbe_adapter *adapter)
|
|
|
|
|
|
ixgbe_cache_ring_dcb(adapter);
|
|
|
/* find out queues in TC for FCoE */
|
|
|
- fcoe_rx_i = adapter->rx_ring[fcoe->tc].reg_idx + 1;
|
|
|
- fcoe_tx_i = adapter->tx_ring[fcoe->tc].reg_idx + 1;
|
|
|
+ fcoe_rx_i = adapter->rx_ring[fcoe->tc]->reg_idx + 1;
|
|
|
+ fcoe_tx_i = adapter->tx_ring[fcoe->tc]->reg_idx + 1;
|
|
|
/*
|
|
|
* In 82599, the number of Tx queues for each traffic
|
|
|
* class for both 8-TC and 4-TC modes are:
|
|
@@ -3746,8 +3746,8 @@ static inline bool ixgbe_cache_ring_fcoe(struct ixgbe_adapter *adapter)
|
|
|
fcoe_tx_i = f->mask;
|
|
|
}
|
|
|
for (i = 0; i < f->indices; i++, fcoe_rx_i++, fcoe_tx_i++) {
|
|
|
- adapter->rx_ring[f->mask + i].reg_idx = fcoe_rx_i;
|
|
|
- adapter->tx_ring[f->mask + i].reg_idx = fcoe_tx_i;
|
|
|
+ adapter->rx_ring[f->mask + i]->reg_idx = fcoe_rx_i;
|
|
|
+ adapter->tx_ring[f->mask + i]->reg_idx = fcoe_tx_i;
|
|
|
}
|
|
|
ret = true;
|
|
|
}
|
|
@@ -3765,8 +3765,8 @@ static inline bool ixgbe_cache_ring_fcoe(struct ixgbe_adapter *adapter)
|
|
|
*/
|
|
|
static inline bool ixgbe_cache_ring_sriov(struct ixgbe_adapter *adapter)
|
|
|
{
|
|
|
- adapter->rx_ring[0].reg_idx = adapter->num_vfs * 2;
|
|
|
- adapter->tx_ring[0].reg_idx = adapter->num_vfs * 2;
|
|
|
+ adapter->rx_ring[0]->reg_idx = adapter->num_vfs * 2;
|
|
|
+ adapter->tx_ring[0]->reg_idx = adapter->num_vfs * 2;
|
|
|
if (adapter->num_vfs)
|
|
|
return true;
|
|
|
else
|
|
@@ -3787,8 +3787,8 @@ static inline bool ixgbe_cache_ring_sriov(struct ixgbe_adapter *adapter)
|
|
|
static void ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
|
|
|
{
|
|
|
/* start with default case */
|
|
|
- adapter->rx_ring[0].reg_idx = 0;
|
|
|
- adapter->tx_ring[0].reg_idx = 0;
|
|
|
+ adapter->rx_ring[0]->reg_idx = 0;
|
|
|
+ adapter->tx_ring[0]->reg_idx = 0;
|
|
|
|
|
|
if (ixgbe_cache_ring_sriov(adapter))
|
|
|
return;
|
|
@@ -3821,33 +3821,63 @@ static void ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
|
|
|
static int ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
|
|
|
{
|
|
|
int i;
|
|
|
-
|
|
|
- adapter->tx_ring = kcalloc(adapter->num_tx_queues,
|
|
|
- sizeof(struct ixgbe_ring), GFP_KERNEL);
|
|
|
- if (!adapter->tx_ring)
|
|
|
- goto err_tx_ring_allocation;
|
|
|
-
|
|
|
- adapter->rx_ring = kcalloc(adapter->num_rx_queues,
|
|
|
- sizeof(struct ixgbe_ring), GFP_KERNEL);
|
|
|
- if (!adapter->rx_ring)
|
|
|
- goto err_rx_ring_allocation;
|
|
|
+ int orig_node = adapter->node;
|
|
|
|
|
|
for (i = 0; i < adapter->num_tx_queues; i++) {
|
|
|
- adapter->tx_ring[i].count = adapter->tx_ring_count;
|
|
|
- adapter->tx_ring[i].queue_index = i;
|
|
|
+ struct ixgbe_ring *ring = adapter->tx_ring[i];
|
|
|
+ if (orig_node == -1) {
|
|
|
+ int cur_node = next_online_node(adapter->node);
|
|
|
+ if (cur_node == MAX_NUMNODES)
|
|
|
+ cur_node = first_online_node;
|
|
|
+ adapter->node = cur_node;
|
|
|
+ }
|
|
|
+ ring = kzalloc_node(sizeof(struct ixgbe_ring), GFP_KERNEL,
|
|
|
+ adapter->node);
|
|
|
+ if (!ring)
|
|
|
+ ring = kzalloc(sizeof(struct ixgbe_ring), GFP_KERNEL);
|
|
|
+ if (!ring)
|
|
|
+ goto err_tx_ring_allocation;
|
|
|
+ ring->count = adapter->tx_ring_count;
|
|
|
+ ring->queue_index = i;
|
|
|
+ ring->numa_node = adapter->node;
|
|
|
+
|
|
|
+ adapter->tx_ring[i] = ring;
|
|
|
}
|
|
|
|
|
|
+ /* Restore the adapter's original node */
|
|
|
+ adapter->node = orig_node;
|
|
|
+
|
|
|
for (i = 0; i < adapter->num_rx_queues; i++) {
|
|
|
- adapter->rx_ring[i].count = adapter->rx_ring_count;
|
|
|
- adapter->rx_ring[i].queue_index = i;
|
|
|
+ struct ixgbe_ring *ring = adapter->rx_ring[i];
|
|
|
+ if (orig_node == -1) {
|
|
|
+ int cur_node = next_online_node(adapter->node);
|
|
|
+ if (cur_node == MAX_NUMNODES)
|
|
|
+ cur_node = first_online_node;
|
|
|
+ adapter->node = cur_node;
|
|
|
+ }
|
|
|
+ ring = kzalloc_node(sizeof(struct ixgbe_ring), GFP_KERNEL,
|
|
|
+ adapter->node);
|
|
|
+ if (!ring)
|
|
|
+ ring = kzalloc(sizeof(struct ixgbe_ring), GFP_KERNEL);
|
|
|
+ if (!ring)
|
|
|
+ goto err_rx_ring_allocation;
|
|
|
+ ring->count = adapter->rx_ring_count;
|
|
|
+ ring->queue_index = i;
|
|
|
+ ring->numa_node = adapter->node;
|
|
|
+
|
|
|
+ adapter->rx_ring[i] = ring;
|
|
|
}
|
|
|
|
|
|
+ /* Restore the adapter's original node */
|
|
|
+ adapter->node = orig_node;
|
|
|
+
|
|
|
ixgbe_cache_ring_register(adapter);
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
err_rx_ring_allocation:
|
|
|
- kfree(adapter->tx_ring);
|
|
|
+ for (i = 0; i < adapter->num_tx_queues; i++)
|
|
|
+ kfree(adapter->tx_ring[i]);
|
|
|
err_tx_ring_allocation:
|
|
|
return -ENOMEM;
|
|
|
}
|
|
@@ -4077,10 +4107,16 @@ err_set_interrupt:
|
|
|
**/
|
|
|
void ixgbe_clear_interrupt_scheme(struct ixgbe_adapter *adapter)
|
|
|
{
|
|
|
- kfree(adapter->tx_ring);
|
|
|
- kfree(adapter->rx_ring);
|
|
|
- adapter->tx_ring = NULL;
|
|
|
- adapter->rx_ring = NULL;
|
|
|
+ int i;
|
|
|
+
|
|
|
+ for (i = 0; i < adapter->num_tx_queues; i++) {
|
|
|
+ kfree(adapter->tx_ring[i]);
|
|
|
+ adapter->tx_ring[i] = NULL;
|
|
|
+ }
|
|
|
+ for (i = 0; i < adapter->num_rx_queues; i++) {
|
|
|
+ kfree(adapter->rx_ring[i]);
|
|
|
+ adapter->rx_ring[i] = NULL;
|
|
|
+ }
|
|
|
|
|
|
ixgbe_free_q_vectors(adapter);
|
|
|
ixgbe_reset_interrupt_capability(adapter);
|
|
@@ -4272,7 +4308,7 @@ int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
|
|
|
int size;
|
|
|
|
|
|
size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
|
|
|
- tx_ring->tx_buffer_info = vmalloc_node(size, adapter->node);
|
|
|
+ tx_ring->tx_buffer_info = vmalloc_node(size, tx_ring->numa_node);
|
|
|
if (!tx_ring->tx_buffer_info)
|
|
|
tx_ring->tx_buffer_info = vmalloc(size);
|
|
|
if (!tx_ring->tx_buffer_info)
|
|
@@ -4314,25 +4350,15 @@ err:
|
|
|
static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
|
|
|
{
|
|
|
int i, err = 0;
|
|
|
- int orig_node = adapter->node;
|
|
|
|
|
|
for (i = 0; i < adapter->num_tx_queues; i++) {
|
|
|
- if (orig_node == -1) {
|
|
|
- int cur_node = next_online_node(adapter->node);
|
|
|
- if (cur_node == MAX_NUMNODES)
|
|
|
- cur_node = first_online_node;
|
|
|
- adapter->node = cur_node;
|
|
|
- }
|
|
|
- err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
|
|
|
+ err = ixgbe_setup_tx_resources(adapter, adapter->tx_ring[i]);
|
|
|
if (!err)
|
|
|
continue;
|
|
|
DPRINTK(PROBE, ERR, "Allocation for Tx Queue %u failed\n", i);
|
|
|
break;
|
|
|
}
|
|
|
|
|
|
- /* reset the node back to its starting value */
|
|
|
- adapter->node = orig_node;
|
|
|
-
|
|
|
return err;
|
|
|
}
|
|
|
|
|
@@ -4396,25 +4422,15 @@ alloc_failed:
|
|
|
static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
|
|
|
{
|
|
|
int i, err = 0;
|
|
|
- int orig_node = adapter->node;
|
|
|
|
|
|
for (i = 0; i < adapter->num_rx_queues; i++) {
|
|
|
- if (orig_node == -1) {
|
|
|
- int cur_node = next_online_node(adapter->node);
|
|
|
- if (cur_node == MAX_NUMNODES)
|
|
|
- cur_node = first_online_node;
|
|
|
- adapter->node = cur_node;
|
|
|
- }
|
|
|
- err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
|
|
|
+ err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
|
|
|
if (!err)
|
|
|
continue;
|
|
|
DPRINTK(PROBE, ERR, "Allocation for Rx Queue %u failed\n", i);
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|
break;
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}
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|
|
|
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- /* reset the node back to its starting value */
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|
- adapter->node = orig_node;
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|
-
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|
return err;
|
|
|
}
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|
|
|
|
@@ -4451,8 +4467,8 @@ static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
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|
int i;
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|
|
|
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|
for (i = 0; i < adapter->num_tx_queues; i++)
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|
- if (adapter->tx_ring[i].desc)
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|
- ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
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|
+ if (adapter->tx_ring[i]->desc)
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|
+ ixgbe_free_tx_resources(adapter, adapter->tx_ring[i]);
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|
}
|
|
|
|
|
|
/**
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|
@@ -4488,8 +4504,8 @@ static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
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|
|
int i;
|
|
|
|
|
|
for (i = 0; i < adapter->num_rx_queues; i++)
|
|
|
- if (adapter->rx_ring[i].desc)
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|
|
- ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
|
|
|
+ if (adapter->rx_ring[i]->desc)
|
|
|
+ ixgbe_free_rx_resources(adapter, adapter->rx_ring[i]);
|
|
|
}
|
|
|
|
|
|
/**
|
|
@@ -4766,8 +4782,8 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)
|
|
|
adapter->hw_rx_no_dma_resources +=
|
|
|
IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
|
|
|
for (i = 0; i < adapter->num_rx_queues; i++) {
|
|
|
- rsc_count += adapter->rx_ring[i].rsc_count;
|
|
|
- rsc_flush += adapter->rx_ring[i].rsc_flush;
|
|
|
+ rsc_count += adapter->rx_ring[i]->rsc_count;
|
|
|
+ rsc_flush += adapter->rx_ring[i]->rsc_flush;
|
|
|
}
|
|
|
adapter->rsc_total_count = rsc_count;
|
|
|
adapter->rsc_total_flush = rsc_flush;
|
|
@@ -4775,11 +4791,11 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)
|
|
|
|
|
|
/* gather some stats to the adapter struct that are per queue */
|
|
|
for (i = 0; i < adapter->num_tx_queues; i++)
|
|
|
- restart_queue += adapter->tx_ring[i].restart_queue;
|
|
|
+ restart_queue += adapter->tx_ring[i]->restart_queue;
|
|
|
adapter->restart_queue = restart_queue;
|
|
|
|
|
|
for (i = 0; i < adapter->num_rx_queues; i++)
|
|
|
- non_eop_descs += adapter->rx_ring[i].non_eop_descs;
|
|
|
+ non_eop_descs += adapter->rx_ring[i]->non_eop_descs;
|
|
|
adapter->non_eop_descs = non_eop_descs;
|
|
|
|
|
|
adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
|
|
@@ -5018,7 +5034,7 @@ static void ixgbe_fdir_reinit_task(struct work_struct *work)
|
|
|
if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
|
|
|
for (i = 0; i < adapter->num_tx_queues; i++)
|
|
|
set_bit(__IXGBE_FDIR_INIT_DONE,
|
|
|
- &(adapter->tx_ring[i].reinit_state));
|
|
|
+ &(adapter->tx_ring[i]->reinit_state));
|
|
|
} else {
|
|
|
DPRINTK(PROBE, ERR, "failed to finish FDIR re-initialization, "
|
|
|
"ignored adding FDIR ATR filters \n");
|
|
@@ -5120,7 +5136,7 @@ static void ixgbe_watchdog_task(struct work_struct *work)
|
|
|
|
|
|
if (!netif_carrier_ok(netdev)) {
|
|
|
for (i = 0; i < adapter->num_tx_queues; i++) {
|
|
|
- tx_ring = &adapter->tx_ring[i];
|
|
|
+ tx_ring = adapter->tx_ring[i];
|
|
|
if (tx_ring->next_to_use != tx_ring->next_to_clean) {
|
|
|
some_tx_pending = 1;
|
|
|
break;
|
|
@@ -5622,7 +5638,7 @@ static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
|
|
|
}
|
|
|
}
|
|
|
|
|
|
- tx_ring = &adapter->tx_ring[skb->queue_mapping];
|
|
|
+ tx_ring = adapter->tx_ring[skb->queue_mapping];
|
|
|
|
|
|
if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
|
|
|
(skb->protocol == htons(ETH_P_FCOE))) {
|