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@@ -140,7 +140,7 @@ block_irq(int irq, int cpu)
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spin_lock_irqsave(&irq_lock, flags);
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intr_mask = REG_RD_INT(intr_vect, irq_regs[cpu], rw_mask);
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- /* Remember; 1 let thru, 0 block. */
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+ /* Remember; 1 let through, 0 block. */
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intr_mask &= ~(1 << (irq - FIRST_IRQ));
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REG_WR_INT(intr_vect, irq_regs[cpu], rw_mask, intr_mask);
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@@ -156,7 +156,7 @@ unblock_irq(int irq, int cpu)
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spin_lock_irqsave(&irq_lock, flags);
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intr_mask = REG_RD_INT(intr_vect, irq_regs[cpu], rw_mask);
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- /* Remember; 1 let thru, 0 block. */
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+ /* Remember; 1 let through, 0 block. */
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intr_mask |= (1 << (irq - FIRST_IRQ));
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REG_WR_INT(intr_vect, irq_regs[cpu], rw_mask, intr_mask);
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@@ -308,7 +308,7 @@ crisv32_do_multiple(struct pt_regs* regs)
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*/
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irq_enter();
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- /* Get which IRQs that happend. */
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+ /* Get which IRQs that happened. */
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masked = REG_RD_INT(intr_vect, irq_regs[cpu], r_masked_vect);
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/* Calculate new IRQ mask with these IRQs disabled. */
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@@ -366,7 +366,7 @@ init_IRQ(void)
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for (i = 0; i < 256; i++)
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etrax_irv->v[i] = weird_irq;
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- /* Point all IRQ's to bad handlers. */
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+ /* Point all IRQs to bad handlers. */
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for (i = FIRST_IRQ, j = 0; j < NR_IRQS; i++, j++) {
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irq_desc[j].chip = &crisv32_irq_type;
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set_exception_vector(i, interrupt[j]);
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