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ioat3: fix pq completion versus channel deallocation race

The completion of a pq operation is notified with a null descriptor
appended to the end of the chain.  This descriptor needs to be visible
to dma clients otherwise the client is precluded from ensuring all
operations are quiesced before freeing channel resources, i.e. due to
descriptor polling it may get the completion notification ahead of the
interrupt delivered by the null descriptor.

Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Dan Williams 15 years ago
parent
commit
49954c1567
1 changed files with 2 additions and 2 deletions
  1. 2 2
      drivers/dma/ioat/dma_v3.c

+ 2 - 2
drivers/dma/ioat/dma_v3.c

@@ -571,7 +571,7 @@ __ioat3_prep_xor_lock(struct dma_chan *c, enum sum_check_flags *result,
 	dump_desc_dbg(ioat, compl_desc);
 	dump_desc_dbg(ioat, compl_desc);
 
 
 	/* we leave the channel locked to ensure in order submission */
 	/* we leave the channel locked to ensure in order submission */
-	return &desc->txd;
+	return &compl_desc->txd;
 }
 }
 
 
 static struct dma_async_tx_descriptor *
 static struct dma_async_tx_descriptor *
@@ -730,7 +730,7 @@ __ioat3_prep_pq_lock(struct dma_chan *c, enum sum_check_flags *result,
 	dump_desc_dbg(ioat, compl_desc);
 	dump_desc_dbg(ioat, compl_desc);
 
 
 	/* we leave the channel locked to ensure in order submission */
 	/* we leave the channel locked to ensure in order submission */
-	return &desc->txd;
+	return &compl_desc->txd;
 }
 }
 
 
 static struct dma_async_tx_descriptor *
 static struct dma_async_tx_descriptor *