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@@ -67,6 +67,7 @@ static const struct ar9300_eeprom ar9300_default = {
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* bit2 - enable fastClock - enabled
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* bit3 - enable doubling - enabled
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* bit4 - enable internal regulator - disabled
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+ * bit5 - enable pa predistortion - disabled
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*/
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.miscConfiguration = 0, /* bit0 - turn down drivestrength */
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.eepromWriteEnableGpio = 3,
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@@ -129,9 +130,11 @@ static const struct ar9300_eeprom ar9300_default = {
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.txEndToRxOn = 0x2,
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.txFrameToXpaOn = 0xe,
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.thresh62 = 28,
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- .futureModal = { /* [32] */
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+ .papdRateMaskHt20 = LE32(0x80c080),
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+ .papdRateMaskHt40 = LE32(0x80c080),
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+ .futureModal = {
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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+ 0, 0, 0, 0, 0, 0, 0, 0
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},
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},
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.calFreqPier2G = {
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@@ -326,9 +329,11 @@ static const struct ar9300_eeprom ar9300_default = {
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.txEndToRxOn = 0x2,
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.txFrameToXpaOn = 0xe,
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.thresh62 = 28,
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+ .papdRateMaskHt20 = LE32(0xf0e0e0),
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+ .papdRateMaskHt40 = LE32(0xf0e0e0),
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.futureModal = {
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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+ 0, 0, 0, 0, 0, 0, 0, 0
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},
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},
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.calFreqPier5G = {
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@@ -644,6 +649,8 @@ static u32 ath9k_hw_ar9300_get_eeprom(struct ath_hw *ah,
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return (pBase->featureEnable & 0x10) >> 4;
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case EEP_SWREG:
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return le32_to_cpu(pBase->swreg);
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+ case EEP_PAPRD:
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+ return !!(pBase->featureEnable & BIT(5));
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default:
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return 0;
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}
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