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@@ -18,6 +18,7 @@
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#include <linux/bitops.h>
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#include <linux/uaccess.h>
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#include <linux/clk.h>
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+#include <linux/delay.h>
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#define DRV_NAME "WDOG COH 901 327"
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@@ -92,6 +93,8 @@ static struct clk *clk;
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static void coh901327_enable(u16 timeout)
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{
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u16 val;
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+ unsigned long freq;
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+ unsigned long delay_ns;
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clk_enable(clk);
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/* Restart timer if it is disabled */
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@@ -102,6 +105,14 @@ static void coh901327_enable(u16 timeout)
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/* Acknowledge any pending interrupt so it doesn't just fire off */
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writew(U300_WDOG_IER_WILL_BARK_IRQ_ACK_ENABLE,
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virtbase + U300_WDOG_IER);
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+ /*
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+ * The interrupt is cleared in the 32 kHz clock domain.
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+ * Wait 3 32 kHz cycles for it to take effect
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+ */
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+ freq = clk_get_rate(clk);
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+ delay_ns = (1000000000 + freq - 1) / freq; /* Freq to ns and round up */
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+ delay_ns = 3 * delay_ns; /* Wait 3 cycles */
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+ ndelay(delay_ns);
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/* Enable the watchdog interrupt */
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writew(U300_WDOG_IMR_WILL_BARK_IRQ_ENABLE, virtbase + U300_WDOG_IMR);
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/* Activate the watchdog timer */
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