|
@@ -267,7 +267,6 @@ static const struct imxmmc_platform_data sdhc_pdata __initconst = {
|
|
|
.exit = pca100_sdhc2_exit,
|
|
|
};
|
|
|
|
|
|
-#if defined(CONFIG_USB_ULPI)
|
|
|
static int otg_phy_init(struct platform_device *pdev)
|
|
|
{
|
|
|
gpio_set_value(OTG_PHY_CS_GPIO, 0);
|
|
@@ -295,7 +294,6 @@ static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
|
|
|
.init = usbh2_phy_init,
|
|
|
.portsc = MXC_EHCI_MODE_ULPI,
|
|
|
};
|
|
|
-#endif
|
|
|
|
|
|
static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
|
|
|
.operating_mode = FSL_USB2_DR_DEVICE,
|
|
@@ -402,23 +400,22 @@ static void __init pca100_init(void)
|
|
|
gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs");
|
|
|
gpio_direction_output(USBH2_PHY_CS_GPIO, 1);
|
|
|
|
|
|
-#if defined(CONFIG_USB_ULPI)
|
|
|
if (otg_mode_host) {
|
|
|
- otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
|
|
|
- ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
|
|
|
+ otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
|
|
|
+ ULPI_OTG_DRVVBUS_EXT);
|
|
|
|
|
|
- imx27_add_mxc_ehci_otg(&otg_pdata);
|
|
|
+ if (otg_pdata.otg)
|
|
|
+ imx27_add_mxc_ehci_otg(&otg_pdata);
|
|
|
+ } else {
|
|
|
+ gpio_set_value(OTG_PHY_CS_GPIO, 0);
|
|
|
+ imx27_add_fsl_usb2_udc(&otg_device_pdata);
|
|
|
}
|
|
|
|
|
|
usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
|
|
|
ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
|
|
|
|
|
|
- imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
|
|
|
-#endif
|
|
|
- if (!otg_mode_host) {
|
|
|
- gpio_set_value(OTG_PHY_CS_GPIO, 0);
|
|
|
- imx27_add_fsl_usb2_udc(&otg_device_pdata);
|
|
|
- }
|
|
|
+ if (usbh2_pdata.otg)
|
|
|
+ imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
|
|
|
|
|
|
imx27_add_imx_fb(&pca100_fb_data);
|
|
|
|