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+/*
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+ * arch/arm/mach-dove/board-dt.c
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+ *
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+ * Marvell Dove 88AP510 System On Chip FDT Board
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+ *
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+ * This file is licensed under the terms of the GNU General Public
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+ * License version 2. This program is licensed "as is" without any
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+ * warranty of any kind, whether express or implied.
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+ */
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+
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+#include <linux/init.h>
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+#include <linux/clk-provider.h>
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+#include <linux/clk/mvebu.h>
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+#include <linux/of.h>
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+#include <linux/of_platform.h>
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+#include <linux/platform_data/usb-ehci-orion.h>
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+#include <asm/hardware/cache-tauros2.h>
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+#include <asm/mach/arch.h>
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+#include <mach/pm.h>
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+#include <plat/common.h>
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+#include <plat/irq.h>
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+#include "common.h"
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+
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+/*
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+ * There are still devices that doesn't even know about DT,
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+ * get clock gates here and add a clock lookup.
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+ */
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+static void __init dove_legacy_clk_init(void)
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+{
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+ struct device_node *np = of_find_compatible_node(NULL, NULL,
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+ "marvell,dove-gating-clock");
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+ struct of_phandle_args clkspec;
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+
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+ clkspec.np = np;
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+ clkspec.args_count = 1;
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+
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+ clkspec.args[0] = CLOCK_GATING_BIT_USB0;
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+ orion_clkdev_add(NULL, "orion-ehci.0",
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+ of_clk_get_from_provider(&clkspec));
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+
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+ clkspec.args[0] = CLOCK_GATING_BIT_USB1;
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+ orion_clkdev_add(NULL, "orion-ehci.1",
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+ of_clk_get_from_provider(&clkspec));
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+
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+ clkspec.args[0] = CLOCK_GATING_BIT_GBE;
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+ orion_clkdev_add(NULL, "mv643xx_eth_port.0",
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+ of_clk_get_from_provider(&clkspec));
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+
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+ clkspec.args[0] = CLOCK_GATING_BIT_PCIE0;
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+ orion_clkdev_add("0", "pcie",
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+ of_clk_get_from_provider(&clkspec));
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+
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+ clkspec.args[0] = CLOCK_GATING_BIT_PCIE1;
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+ orion_clkdev_add("1", "pcie",
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+ of_clk_get_from_provider(&clkspec));
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+}
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+
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+static void __init dove_of_clk_init(void)
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+{
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+ mvebu_clocks_init();
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+ dove_legacy_clk_init();
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+}
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+
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+static struct mv643xx_eth_platform_data dove_dt_ge00_data = {
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+ .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT,
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+};
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+
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+static void __init dove_dt_init(void)
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+{
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+ pr_info("Dove 88AP510 SoC\n");
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+
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+#ifdef CONFIG_CACHE_TAUROS2
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+ tauros2_init(0);
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+#endif
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+ dove_setup_cpu_mbus();
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+
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+ /* Setup root of clk tree */
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+ dove_of_clk_init();
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+
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+ /* Internal devices not ported to DT yet */
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+ dove_ge00_init(&dove_dt_ge00_data);
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+ dove_ehci0_init();
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+ dove_ehci1_init();
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+ dove_pcie_init(1, 1);
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+
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+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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+}
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+
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+static const char * const dove_dt_board_compat[] = {
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+ "marvell,dove",
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+ NULL
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+};
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+
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+DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
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+ .map_io = dove_map_io,
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+ .init_early = dove_init_early,
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+ .init_irq = orion_dt_init_irq,
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+ .init_time = dove_timer_init,
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+ .init_machine = dove_dt_init,
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+ .restart = dove_restart,
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+ .dt_compat = dove_dt_board_compat,
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+MACHINE_END
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